Display Panel Test Structure with Segmented Pads

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Solution Overview

Problem

Existing display panel test structures face issues such as excessive current generation and data line scratching due to pin-miss situations and the use of numerous small block pins, which can lead to burnout or abnormalities during signal loading in dot-inversion or line-inversion modes.

Innovation Solution

A display panel test structure is designed with N groups of data lines connected by first shorting bars and first test pads, allowing block pins to contact the pads instead of the lines, reducing the risk of short circuits and scratches, and featuring wider pads and increased spacing to enhance contact stability and prevent burnout.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If numerous small block pins are used to contact data lines for testing, then the test coverage is improved, but the data lines may be scratched and the risk of short circuits increases

Engineering Contradiction:
Improvetest coverageVSAvoiddata line scratching
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces test pads as intermediary elements between the block pins and data lines. Instead of having block pins directly contact the data lines, the pins contact the larger test pads which are electrically connected to the data lines through shorting bars. This intermediary structure prevents direct mechanical contact between pins and data lines, eliminating scratching while maintaining electrical connectivity for testing.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If block pins are used to contact data lines directly, then the test structure is simple, but excessive current is generated causing burnout in dot-inversion or line-inversion modes

Engineering Contradiction:
Improvetest structure simplicityVSAvoidexcessive current generation
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent segments the test structure by introducing separate test pads and shorting bars that divide the data lines into groups. Each test pad connects to multiple data lines through shorting bars, creating a segmented testing architecture. This segmentation allows current to be distributed across multiple paths and prevents excessive current concentration that would cause burnout during inversion mode testing.

Inventive Principle:
Principle #1Segmentation

3Area of stationary object

If small block pins are used for testing, then the test area is compact, but the pins may fail to contact data lines reliably (Pin-miss situation)

Engineering Contradiction:
Improvetest area compactnessVSAvoidcontact reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent transitions from one-dimensional point contact (small pins contacting thin data lines) to a two-dimensional area contact (larger test pads connected to multiple data lines through shorting bars). This dimensional change increases the contact area and provides multiple contact paths, making the test structure more tolerant of positioning variations and eliminating Pin-miss failures while maintaining a compact test area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9921446B2Display panel test structure
Publication Date: 2018.03.20 BOE TECHNOLOGY GROUP CO LTD
  • US9921446B2 patent drawing
  • US9921446B2 patent drawing
  • US9921446B2 patent drawing

AI summary

The present application discloses a display panel test structure for testing whether signal lines of a display panel are defective, the signal lines at least comprising a plurality of data lines which are divided into N groups, the display panel test structure comprising N first shorting bars arranged in a test area of the display panel, each of which being configured to short-circuit a group of data lines, wherein the display panel test structure further comprises a plurality of first test pads arranged in the test area, each of which connects with one shorting bar corresponding thereto, and each of the first test pads is configured to load a signal to a group of data lines corresponding thereto during a test.