Display Panel Third Conductive Layer Bridge Resistance Fluctuation

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Solution Overview

Problem

Display panels face issues with low gray-scale uniformity and uneven brightness due to high sheet resistance and fluctuations in conductive trace film thickness and size, leading to mura problems like uneven display brightness and graininess.

Innovation Solution

A display panel design featuring a base substrate with multiple transistors connected through a third conductive layer with bridge portions, where the sheet resistance of the third conductive layer is lower than the via-hole connection portions, reducing resistance fluctuations and improving uniformity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductive traces are used to connect transistors in the active layer, then transistor connectivity is achieved, but sheet resistance is large and resistance fluctuation is high

Engineering Contradiction:
Improvetransistor connectivityVSAvoidsheet resistance uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The conductive path is segmented into multiple components: via-hole connection portions in the active layer and bridge portions in the third conductive layer. This segmentation allows each component to be optimized independently, with the bridge portions providing low resistance connections between active portions while the via-holes maintain necessary connectivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a vertical dimension by using multiple conductive layers (first conductive layer, second conductive layer, and third conductive layer) stacked above the active layer. The bridge portions in the third conductive layer extend horizontally across the substrate, creating a three-dimensional conductive pathway that reduces resistance by utilizing both vertical and horizontal dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If conductive trace film thickness and size vary, then manufacturing flexibility is improved, but resistance fluctuation increases causing mura problems

Engineering Contradiction:
Improvefilm thickness variabilityVSAvoiddisplay uniformity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The bridge portions in the third conductive layer serve as intermediary elements that connect the active portions. These bridge portions are specifically designed to have low sheet resistance, acting as mediators that compensate for variations in the active layer conductive traces. The via-hole connection portions also function as intermediaries, providing stable connection points between layers.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Strength

If via-hole connection portions are used to connect active portions, then structural integrity is maintained, but sheet resistance is higher than ideal

Engineering Contradiction:
Improvestructural integrityVSAvoidsheet resistance
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The patent merges the functionality of multiple conductive layers by integrating via-hole connection portions in the active layer with bridge portions in the third conductive layer. This combination creates a hybrid conductive pathway where the via-holes provide structural integrity and the bridge portions provide low resistance, achieving both structural and electrical performance goals simultaneously.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20240331631A1Display panel and display apparatus
Publication Date: 2024.10.03 CHONGQING BOE DISPLAY TECH CO LTD
  • US20240331631A1 patent drawing
  • US20240331631A1 patent drawing
  • US20240331631A1 patent drawing

AI summary

The present disclosure provides a display panel and a display device. The display panel includes: a base substrate, a first active layer on a side of the base substrate, and a third conductive layer on a side of the first active layer away from the base substrate. The first active layer includes active portions spaced apart, wherein each active portion includes a sub-active portion and a via-hole connection portion connected to each other, and the sub-active portion is disposed corresponding to a transistor of two or more transistors, and configured to form a channel region of the corresponding transistor. The third conductive layer includes at least one bridge portion, wherein the at least one bridge portion is connected to via-hole connection portions in different active portions through via holes, respectively. A sheet resistance of the third conductive layer is less than a sheet resistance of the via hole connection portion.