Display Panel Signal Routing via Third Metal Layer
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Solution Overview
Problem
Conventional display panels face challenges in reducing the border width as the resolution increases, due to the limited design of gate lines and data lines that occupy a significant area in the non-display region, making it difficult to achieve a narrow border.
Innovation Solution
The display panel design includes first, second, and third signal lines formed in different metal layers, with insulation layers and vias connecting them, allowing for a reduced wire route in the non-display area by electrically connecting the signal lines through connection structures, thereby decreasing the border width.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate lines and data lines are extended toward the non-display area for electrical connection to the driving circuit, then the display panel can function properly, but the border width increases
Solution Approach 1:
The patent introduces a third metal layer to route signal lines vertically through the substrate thickness dimension. Third signal lines are formed in this third metal layer and connect to first signal lines (in the first metal layer) through vias, allowing signal transmission without extending gate lines and data lines laterally into the non-display area. This dimensional transition from 2D planar routing to 3D vertical routing resolves the contradiction between maintaining electrical connection and reducing border width.
Solution Approach 2:
The patent introduces third signal lines as intermediary conductors that mediate between the first signal lines (gate lines or data lines) and the driving circuit. These third signal lines are routed through the third metal layer and connect to first signal lines via vias, serving as a bridge that eliminates the need for first signal lines to extend into the non-display area. The intermediary third signal lines carry the electrical connection function while keeping the primary signal lines confined to the display area.
2Measurement precision
If the resolution of the display device is increased, then the display quality is improved, but the gate lines and data lines occupy larger area in the non-display area
Solution Approach 1:
The patent utilizes the third metal layer dimension to route third signal lines vertically, transferring the routing function from the horizontal plane to the vertical dimension. This allows the first signal lines (which increase in number with higher resolution) to remain confined to the display area without occupying additional non-display area. The third signal lines in the third metal layer handle the increased signal routing demands of high-resolution displays without expanding the border.
Solution Approach 2:
The third signal lines act as intermediaries that absorb the increased routing complexity associated with higher resolutions. As resolution increases and more first signal lines are needed, the third signal lines in the third metal layer provide additional routing pathways that do not compete for space in the non-display area. This intermediary routing layer isolates the resolution-dependent signal density from the border region.
3Reliability
If gate lines and data lines are concentrated toward the driving circuit area, then the electrical connection is achieved, but the border width is limited and cannot be reduced
Solution Approach 1:
The patent transitions the signal routing from horizontal concentration in the non-display area to vertical routing through the third metal layer. Third signal lines extend through the substrate thickness and connect to first signal lines via vias distributed across the display area, eliminating the need for lateral concentration of signal lines at the border. This dimensional change allows electrical connection without horizontal concentration, thereby reducing border width.
Solution Approach 2:
The third signal lines serve as intermediaries that distribute connection points across the display area through vias, rather than concentrating all connections at the border region. This intermediary routing approach allows first signal lines to connect to the driving circuit through vertically-oriented third signal lines at multiple locations, eliminating the need for horizontal concentration and enabling border reduction.
Data Source
AI summary
The display panel includes a first substrate, first signal lines, second signal lines, third signal lines, thin film transistors, pixel electrodes, and at least one driving circuit. The first signal lines respectively intersect with the second signal lines to define multiple pixel regions. At least one of the pixel regions has one of the third signal lines diposed therein. The second signal lines and the third signal lines are electrically connected to the at least one driving circuit. Each of the first signal lines is electrically connected to one of the gate and the source of at least one of the thin film transistors. Each of the second signal lines is electrically connected to the other one of the gate and the source of at least one of the thin film transistors. Each of the third signal lines is electrically connected to one of the first signal lines.