Display Panel Transistor Layout for High Pixel Density
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Solution Overview
Problem
Current display technologies face challenges in achieving high pixel density (PPI) and desirable display effects, particularly in mobile devices, where existing transistors do not efficiently utilize space and materials to enhance display quality.
Innovation Solution
The display panel incorporates a combination of silicon transistors and oxide semiconductor transistors, with optimized channel region dimensions and gate electrode configurations, to increase pixel density by minimizing channel region lengths and utilizing the advantages of both transistor types, thereby saving space and improving display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the pixel density is increased to improve display quality, then the display effect is improved, but the transistor area must be reduced which complicates the circuit design and manufacturing
Solution Approach 1:
The patent applies local quality by using different semiconductor materials for different transistor types within the same pixel circuit. Specifically, oxide semiconductor transistors are used for switch transistors where low leakage is critical, while other transistors may use different materials optimized for their specific functions. This localized material optimization allows the circuit to achieve high pixel density without compromising any transistor's performance, thereby reducing the overall complexity of circuit design at high PPI.
2Reliability
If oxide semiconductor transistors are used to reduce leakage current, then the transistor reliability is improved, but the manufacturing process complexity increases
Solution Approach 1:
The patent segments the transistor population within the pixel circuit by material type, using oxide semiconductors only for specific transistors where leakage control is most critical (such as switch transistors), while other transistors use different semiconductor materials. This segmentation allows the manufacturing process to focus oxide semiconductor fabrication only where needed, rather than requiring all transistors to be manufactured with oxide semiconductors, thereby reducing overall manufacturing complexity while still achieving the reliability benefits where required.
Data Source
AI summary
A display panel includes a base substrate, a third transistor and a fourth transistor. The third transistor and the fourth transistor are formed on the base substrate. The third transistor includes a sixth gate electrode, a third active layer, a third source electrode, and a third drain electrode. The third active layer includes an oxide semiconductor. The fourth transistor includes an eighth gate electrode, a fourth active layer, a fourth source electrode, and a fourth drain electrode. The fourth active layer includes another oxide semiconductor. Along a direction perpendicular to the base substrate, a distance between the sixth gate electrode and the third active layer is D6. A channel region of the third transistor defined by the sixth gate electrode is a sixth channel region. A length of the sixth channel region is L6. A sixth area S6=L6×D6.