Display Panel Driver Circuit for Variable-Resolution Modes
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Solution Overview
Problem
Existing display panels struggle to meet diverse display requirements for different display resolutions, leading to high power consumption, high cost, and compromised display quality, particularly in applications like VR/AR devices that utilize foveated rendering technology.
Innovation Solution
A display panel design with a driver circuit incorporating shift register units connected in cascade and switch modules, where each switch module includes N switch units that operate in a time-sharing manner, allowing for selective control of input signals to meet varying display resolutions without increasing power consumption or cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional driver circuit is used for display panels, then the structure is simple, but it cannot meet differentiated display requirements for different display resolutions
Solution Approach 1:
The driver circuit uses switch modules that can dynamically change their connection states to adapt to different display resolution requirements. The switch modules enable the circuit to switch between different operational modes (full resolution, half resolution, quarter resolution) based on real-time needs, making the driver circuit adaptable rather than fixed in function.
Solution Approach 2:
The driver circuit is designed with switch modules that allow a single circuit structure to perform multiple functions - driving pixels at full resolution, half resolution, or quarter resolution. This multi-functionality eliminates the need for separate driver circuits for different resolution requirements, achieving versatility without proportional increases in overall complexity.
2Ease of manufacture
If the driver circuit is simplified to reduce cost, then manufacturing cost decreases, but power consumption increases
Solution Approach 1:
The driver circuit is segmented into multiple switch modules, each capable of independent control. This segmentation allows the circuit to activate only the necessary portions for the current display resolution requirement, avoiding unnecessary power consumption while maintaining a relatively simple overall structure that is easy to manufacture.
Solution Approach 2:
The switch modules operate in a time-sharing manner, periodically switching between different connection configurations based on the required display resolution. This periodic switching enables the circuit to consume power only when needed for specific resolution modes, reducing overall power consumption while maintaining manufacturing simplicity.
3Adaptability or versatility
If switch modules with N switch units are added to enable time-sharing control, then display quality and adaptability improve, but device complexity increases
Solution Approach 1:
Multiple switch units are merged into integrated switch modules that share common control logic and connection structures. By combining the switch units within modules and having modules work cooperatively, the patent achieves high adaptability while controlling overall complexity through systematic integration rather than disparate components.
Solution Approach 2:
Different regions of the driver circuit can have different switch module configurations tailored to local requirements. This local optimization allows complex switch modules to be placed only where needed for high-resolution display regions, while simpler configurations are used in other areas, achieving high adaptability without uniformly increasing complexity throughout the entire circuit.
Data Source
AI summary
A display panel includes pixels and a driver circuit. The driver circuit includes shift register units and switch modules. Each switch module includes N switch units turned on in a time-sharing manner. A signal input terminal of an M-th-stage shift register unit is electrically connected to a start control signal terminal through any one of an M-th switch unit to an N-th switch unit; and the signal input terminal of the M-th-stage shift register unit is electrically connected to a signal output terminal of at least one of a first-stage to an (M−1)-th-stage shift register unit through a first to an (M−1)-th switch unit. A signal input terminal of an (I+N)-th-stage shift register unit is electrically connected to a signal output terminal of at least one of an I-th-stage to an (I+N−1)-th-stage shift register unit through the N switch units.