Display Panel Pixel Driving Circuit Voltage Drop Reduction
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Solution Overview
Problem
Display panels require high power supply voltages to operate driving transistors in saturation regions, leading to increased power consumption.
Innovation Solution
The display panel incorporates a pixel driving circuit with a capacitor and transistors, where the first electrode of the capacitor is connected to a power line, and the second electrode is connected to the gate of the driving transistor, along with a conductive layer structure that reduces voltage drop and power consumption by forming a grid structure with power lines and conductive lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large cross-voltage is applied between source electrode and drain electrode of the driving transistor, then the driving transistor can operate in saturation region, but the power consumption of the display panel increases
Solution Approach 1:
The power supply voltage is segmented into multiple levels through the capacitor (first capacitor C1 and second capacitor C2) connected at different nodes of the pixel circuit. The first capacitor is connected between the first power supply line (ELVDD) and the gate of the driving transistor, while the second capacitor is connected between the source electrode and the second power supply line (ELVSS). This segmentation allows the circuit to maintain proper voltage differences across transistors without requiring the entire display panel to operate at high voltage, thereby reducing overall power consumption while ensuring saturation region operation.
Solution Approach 2:
Different regions of the pixel circuit are assigned different voltage characteristics. The gate of the driving transistor receives a higher voltage from the first capacitor to ensure saturation operation, while the source and drain electrodes operate at lower voltage levels relative to the second power supply line. This local quality approach allows the driving transistor to maintain reliable operation in the saturation region without requiring the entire display panel to consume high power.
2Ease of operation
If a larger power supply voltage is provided to achieve normal driving, then the driving transistor operates properly, but the power consumption increases
Solution Approach 1:
The power supply system is segmented into multiple voltage levels using capacitors at different circuit nodes. The first capacitor C1 provides voltage boosting at the gate node, while the second capacitor C2 provides voltage reference at the source node relative to ELVSS. This segmentation enables the driving transistor to operate properly with appropriate voltage differences without requiring the entire display panel to be supplied with high voltage, thus reducing overall power consumption.
Solution Approach 2:
The voltage parameters at different nodes of the pixel circuit are changed and optimized independently. By adjusting the capacitance values and connection points of the capacitors, the voltage at the gate, source, and drain electrodes can be independently controlled to achieve proper transistor operation. This parameter optimization allows the circuit to operate efficiently with minimal power consumption while maintaining ease of operation.
3Loss of energy
If the first conductive parts are connected to form conductive lines that connect to multiple first power lines, then the voltage drop is reduced, but the device complexity increases
Solution Approach 1:
Multiple first conductive parts are merged to form continuous first conductive lines that extend across multiple pixel circuits. These conductive lines connect to multiple first power supply lines (ELVDD) at different locations, creating a distributed voltage supply network. This merging approach reduces voltage drop by providing multiple parallel current paths and closer voltage sources to each pixel circuit, while the regular repeating pattern of the conductive lines keeps the manufacturing complexity manageable.
Solution Approach 2:
The conductive layer structure is extended into the planar dimension with first conductive lines running in one direction and connecting to power lines at multiple points. This dimensional approach allows voltage to be supplied from multiple locations across the display panel surface, reducing the resistance and voltage drop along the conductive paths without requiring vertical stacking that would increase device complexity.
Data Source
AI summary
A display panel and a display device are provided. The display panel includes sub pixel units arranged in an array along a first direction (X) and a second direction (Y) intersecting with the first direction (X). The display panel further includes a base substrate (81), a second conductive layer, a fourth conductive layer, and a common electrode layer (6). The second conductive layer includes multiple first conductive parts (21). The first conductive part (21) is arranged in correspondence with the pixel driving circuit. The first conductive part (21) is used to form the first electrode of the capacitor (C) in the pixel driving circuit corresponding thereto. The fourth conductive layer includes multiple first power lines (VSS). Orthographic projections of the first power lines (VSS) on the base substrate (81) are distributed in a spaced manner along the first direction (X) and extend along the second direction (Y).