Display Panel Voltage Line Segmentation for Uniform Brightness

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Solution Overview

Problem

Display panels often emphasize certain colors during testing, leading to inaccurate assessments of their normal operation, as voltage drops across connection lines can cause uneven brightness in pixels, potentially misrepresenting the display's quality.

Innovation Solution

The display panel design includes separate areas with distinct voltage lines and transistors, where gate signals are applied alternately to ensure even voltage distribution across data lines, reducing voltage drops and preventing color emphasis during testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a conventional voltage line configuration is used during testing, then testing can be performed, but voltage drops across connection lines cause uneven brightness in pixels, leading to color emphasis and inaccurate quality assessment

Engineering Contradiction:
Improvedisplay quality assessment accuracyVSAvoidvoltage drop
Core Design Contradiction:
Measurement precisionVSLoss of energy

Solution Approach 1:

The voltage line is divided into multiple segments (first voltage line and second voltage line) that are spatially separated and connect to different groups of data lines. This segmentation reduces the current load on each individual voltage line segment, thereby minimizing voltage drops and ensuring uniform brightness across all pixels during testing without compromising testing capability.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If voltage drops are reduced to prevent color emphasis, then accurate display quality assessment is achieved, but this requires complex voltage line configurations with multiple segments and connection lines

Engineering Contradiction:
Improvedisplay quality assessment accuracyVSAvoidvoltage line configuration
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the voltage supply function into separate, dedicated voltage lines (first voltage line and second voltage line) that are distinct from the data lines. This separation allows each voltage line to be optimized for its specific function, reducing interference and voltage drops while maintaining a manageable configuration through systematic connection to data line groups.

Inventive Principle:
Principle #2Taking out (Extraction)

3Stability of the object's composition

If separate voltage lines are used to minimize voltage drops, then even voltage distribution is achieved, but the number of connection lines and transistors increases

Engineering Contradiction:
Improvevoltage distribution uniformityVSAvoidnumber of connection lines and transistors
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent merges the control function by using a common gate line that controls transistors connected to both the first voltage line and the second voltage line. This integration allows coordinated control of voltage distribution across different pixel groups, achieving uniform brightness while reducing the number of independent control lines compared to a fully separate configuration.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11501706B2Display panel and display apparatus including the same
Publication Date: 2022.11.15 SAMSUNG DISPLAY CO LTD
  • US11501706B2 patent drawing
  • US11501706B2 patent drawing
  • US11501706B2 patent drawing

AI summary

A display panel and a display apparatus, in which a particular color is prevented from being emphasized and displayed in a display area even when the display panel passes testing. The display panel includes: a substrate including a first area and a second area in which first connection nodes and second connection nodes are arranged, the first and second areas being separate from each other; first data lines on the first area; second data lines on the second area and respectively connected to second connection nodes; first connection lines respectively connecting the first data lines to the first connection nodes; a first voltage line; first transistors respectively connected between the first connection nodes and the first voltage line; second transistors respectively connected between the second connection nodes and the first voltage line; and a first gate line connected to gates of the first transistors and gates of the second transistors.