Display Panel Winding Line Layout for Narrower High-Resolution Frames
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Solution Overview
Problem
The increased number of fanout wirings required for high-resolution OLED displays necessitates more space in the active area, challenging the reduction of frame width and increasing wiring complexity.
Innovation Solution
The implementation of winding line segments in the display region of the connection line between the driver assembly and multiplex circuit, reducing the number of connection lines and optimizing the layout to minimize wiring space and interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If fanout wirings are routed from the active area to connect data lines, then the footprint of fanout wiring in the lower frame area is reduced, but the wiring space within the active area increases
Solution Approach 1:
The connection line is routed through the circuit region (a different spatial dimension/zone) rather than staying within the active area, thereby reducing the wiring space occupation in the active area while maintaining connectivity to data lines
2Measurement precision
If the number of data lines is increased to achieve high-resolution display, then the display resolution is improved, but the number of fanout wirings and wiring space requirements increase
Solution Approach 1:
Multiple data lines are merged through the multiplex circuit, allowing a reduced number of physical connection lines to serve multiple data lines, thereby reducing wiring complexity while maintaining high display resolution
Solution Approach 2:
The multiplex circuit acts as an intermediary between the connection lines and data lines, enabling signal multiplexing that reduces the number of required connection lines while supporting high-resolution displays with many data lines
Data Source
AI summary
The present application discloses a display panel and a display device. The driver assembly is disposed in a bonding region and includes a first output unit. The multiplex circuit is disposed in a circuit region and includes a first circuit unit. The connection line is connected between the driver assembly and the multiplex circuit and includes a first connection line is connected between the first circuit unit and the first output unit. A plurality of pixel units are disposed in a display region and is connected to the multiplex circuit. The first connection line includes winding line segments distributed in the display region.