Display Panel Wiring Reduces Data Lines and Bonding Difficulty
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Solution Overview
Problem
High-resolution OLED display panels face increased hardware costs and bonding difficulties due to the large number of data lines and sensing lines required, which complicates the connection of source driving chips and affects display quality.
Innovation Solution
The display panel design reduces the number of data lines and sensing lines by connecting all sub-pixels in a column to a single data line and sharing sensing lines between adjacent columns, while maintaining efficient gate line connections, thereby simplifying the wiring and reducing hardware costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If each pixel unit is connected to separate data lines and sensing lines, then display quality is maintained, but hardware cost and bonding difficulty increase
Solution Approach 1:
Multiple pixel units in the same row share a common data line, and adjacent pixel units share sensing lines. This merging approach reduces the total number of data lines and sensing lines from N×M to approximately 2N+M, significantly lowering hardware cost and bonding complexity while maintaining display quality through proper signal routing and timing control
Solution Approach 2:
The shared data lines and sensing lines serve multiple pixel units simultaneously. Each data line serves all pixel units in its column, and sensing lines serve adjacent pixel units, making the wiring structure more universal and efficient, thereby reducing the overall number of connections required
2Ease of manufacture
If the number of data lines and sensing lines is reduced, then hardware cost and bonding difficulty decrease, but wiring complexity may increase
Solution Approach 1:
The display panel is divided into pixel units that can be independently controlled and sensed. Each pixel unit has a defined structure with specific gate line connections, allowing the wiring to be segmented into manageable patterns that reduce overall complexity while maintaining functionality
Solution Approach 2:
The patent utilizes both row and column dimensional connections efficiently. By organizing pixel units in a grid and connecting them through shared data lines (column-based) and sensing lines (row-based), the wiring structure exploits two-dimensional space to reduce one-dimensional connection count, making bonding easier while maintaining functionality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly reduces the number of data lines and sensing lines, lowering hardware costs, improving bonding yield, and maintaining display quality by optimizing the connection of source driving chips and gate lines.
Implementation Method 1
an emission electrode that emits electrons to form an electron beam
Implementation Method 2
the electron beam interacts with a sample to form an image
Data Source
Figure 1A
Figure 1B
Figure 1C
AI summary
A display panel, a display apparatus and a drive method for a display panel. The display panel (110) comprising multiple pixel units (10) arranged in an array, and data lines and sensing lines connected to the pixel units (10), each pixel unit (10) comprising multiple sub-pixels; all sub-pixels in pixel units (10) in the same column being connected to the same data line, each column of pixel units (10) being connected to two sensing lines, and pixel units of any two adjacent rows having one sensing line in common. The present display panel can decrease a number of data lines and sensing lines, which subsequently can decrease hardware costs and bonding difficulty when using COF to connect a source electrode drive chip to a data line and a sensing line in the display panel, increasing bonding yield.