Display Substrate Pin Layout With Insulated Extension Pads
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Solution Overview
Problem
Signal lines on display panels are prone to interference from cutting channels during the substrate cutting process, leading to potential damage and short circuits.
Innovation Solution
A display substrate design with orthographically distributed pins and extension pads, insulated by spacers, allows signal lines to cross cutting channels without interference, using dielectric layers to maintain electrical isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If signal lines are led out from display panels to corresponding pins on the substrate for testing, then test efficiency is improved, but the signal lines may be easily affected by the cutting channel structure
Solution Approach 1:
The patent introduces extension pads as intermediary elements between the pins and the cutting channel. These extension pads extend in the first direction (perpendicular to the cutting channel) and are distributed at intervals in the second direction (parallel to the cutting channel), creating a buffer zone that isolates the signal lines from the harmful effects of the cutting channel structure while maintaining electrical connection for testing
Solution Approach 2:
The patent changes the spatial arrangement by extending the pads in the first direction (perpendicular to the cutting channel) rather than having them parallel to the cutting channel. This dimensional change allows the signal lines to cross the cutting channel at right angles, minimizing interference from the cutting channel structure while maintaining testability
2Area of stationary object
If multiple extension pads are placed close together for compact design, then device area is reduced, but electrical insulation between adjacent pads becomes difficult to maintain
Solution Approach 1:
The patent introduces spacers as intermediary elements positioned between adjacent extension pads. These spacers are configured to electrically insulate the extension pads from each other, creating an electrical buffer that prevents short circuits while allowing the pads to be placed in close proximity for compact device design
Solution Approach 2:
The patent segments the space between adjacent extension pads by introducing spacers that divide the continuous dielectric layer into isolated regions. This segmentation creates distinct electrical zones that prevent current leakage between adjacent pads while maintaining the overall compact structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents signal line damage and short circuits by ensuring electrical insulation across cutting channels, enhancing test efficiency and reliability.
Implementation Method 1
the plurality of spacers are configured to electrically insulate the plurality of extension pads from each other
Data Source
AI summary
A display substrate (100) and a display device are provided. The display substrate (100) includes: a base substrate (110) including a display area (AA) and a peripheral area (PA); a plurality of sub-pixels (Px1); a plurality of pins (160), wherein orthographic projections of the plurality of pins (160) on the base substrate (110) extend in a first direction (AA′) and distributed at intervals in a second direction (BB′) intersecting with the first direction (AA′); a plurality of leads (71, 74, 75, 78, 79) located in at least the peripheral area (PA), wherein the plurality of pins (160) are electrically connected to the plurality of sub-pixels (Px1) through the plurality of leads (71, 74, 75, 78, 79); a plurality of extension pads (130) located on a side of the plurality of pins (160) away from the display area (AA), wherein the plurality of extension pads (130) extend in the first direction and are distributed at intervals in the second direction, and the plurality of extension pads (130) are electrically connected to the plurality of pins (160); and a plurality of spacers located between the plurality of extension pads (130) and extending in the first direction, wherein orthographic projections of the plurality of spacers on the base substrate (110) do not overlap orthographic projections of the plurality of extension pads (130) on the base substrate, and the plurality of spacers are configured to electrically insulate the plurality of extension pads (130) from each other.