Display Pixel Circuit Bias Electrode Layout for Fewer Contact Holes

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Solution Overview

Problem

Existing display devices face challenges in reducing the number of contact holes in pixel circuits while achieving high-resolution displays.

Innovation Solution

The display device incorporates a first transistor with a bias electrode on a first active layer and a semiconductor region on a second active layer, along with specific transistor doping configurations and additional transistors to reduce contact holes and enhance design flexibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the number of contact holes in a pixel circuit is reduced, then the manufacturing complexity is decreased, but the design flexibility and resolution are compromised

Engineering Contradiction:
Improvemanufacturing complexityVSAvoiddesign flexibility
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The bias electrode is merged with the source electrode of the first transistor, forming a unified structure that performs both biasing and source functions. This merging eliminates the need for separate contact holes for the bias electrode, reducing the total contact hole count while maintaining electrical functionality and design flexibility

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The bias electrode is designed to serve multiple functions simultaneously: it acts as a biasing element for the transistor, a source electrode for current flow, and an electrical connection point. This multi-functionality reduces the number of separate components needed, thereby reducing contact holes while preserving design capabilities

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If the number of contact holes is reduced, then the pixel circuit design is simplified, but the resolution capability is reduced

Engineering Contradiction:
Improvepixel circuit designVSAvoidresolution capability
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The bias electrode is positioned in the first active layer beneath the semiconductor region of the first transistor, utilizing the vertical dimension to place the biasing function at a different layer level. This spatial arrangement allows the bias electrode to function without occupying the same planar space as traditional source/drain contacts, enabling reduced contact hole count while maintaining resolution

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The bias electrode is nested within the structure of the first transistor, positioned in the first active layer and electrically connected to the source electrode. This nested configuration integrates the biasing function within the existing transistor structure rather than adding separate external components, simplifying the overall pixel circuit design while preserving resolution capability

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS20250261512A1Display device
Publication Date: 2025.08.14 SAMSUNG DISPLAY CO LTD
  • US20250261512A1 patent drawing
  • US20250261512A1 patent drawing
  • US20250261512A1 patent drawing

AI summary

A display device comprises a light emitting element disposed on a substrate, a first transistor controlling a driving current supplied to the light emitting element, a second transistor supplying a data voltage to a source electrode of the first transistor, and a third transistor electrically connecting a drain electrode of the first transistor to a gate electrode of the first transistor. The second transistor comprises a semiconductor region disposed in a first active layer on the substrate and a gate electrode disposed in a first gate layer on the first active layer. The first transistor comprises a semiconductor region disposed in a second active layer on the first gate layer, a gate electrode disposed in a second gate layer on the second active layer, and a bias electrode disposed in the first active layer.