Display Panel Pixel Arrangement for Bidirectional Scanning
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Solution Overview
Problem
Liquid crystal displays (LCDs) face challenges in maintaining image orientation when rotated 180 degrees, as conventional gate driving circuits are not capable of displaying images correctly in this orientation due to differential kickback voltage issues during bidirectional scanning.
Innovation Solution
The display apparatus incorporates a structure where the area between adjacent gate lines is divided into first and second pixel areas, with pixel electrodes aligned closely without intervening gate lines, reducing differential kickback voltage by altering the parasitic capacitance and voltage variations during forward and backward scanning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional gate driving circuit is used with single-direction scanning, then the device structure is simple, but the display cannot maintain normal orientation when rotated 180 degrees
Solution Approach 1:
The gate driving circuit is designed to support both forward scanning (from top to bottom) and backward scanning (from bottom to top) modes. The circuit dynamically adapts its operation based on the scanning direction, enabling the display to maintain normal image orientation regardless of whether the LCD is rotated 0 or 180 degrees, thus resolving the contradiction between adaptability and complexity
Solution Approach 2:
The gate driving circuit is designed with multi-functionality to handle both forward and backward scanning operations. By incorporating universal scanning capability, the same circuit can drive the display panel in both directions, eliminating the need for separate driving circuits for different scanning modes and achieving orientation adaptability without proportionally increasing complexity
2Adaptability or versatility
If bidirectional scanning is implemented, then the display can maintain normal orientation when rotated, but differential kickback voltage between pixels increases
Solution Approach 1:
The patent applies local quality by creating alternating pixel row patterns where odd-numbered rows and even-numbered rows have different configurations. Specifically, between adjacent gate lines, the pixel areas are arranged such that pixel electrodes in odd rows are positioned closer to the gate line while even rows have different positioning. This local differentiation reduces the differential kickback voltage that occurs during bidirectional scanning by compensating for the voltage differences between adjacent pixels
Solution Approach 2:
The patent changes the spatial arrangement parameter of pixel electrodes relative to gate lines. By adjusting the position of pixel electrodes in alternating rows and creating different spacing patterns, the parasitic capacitance values are modified. This parameter change reduces the differential kickback voltage during bidirectional scanning while maintaining the ability to scan in both forward and backward directions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the intensity of kickback voltage, enabling proper image display in both forward and backward scanning directions, even when the LCD is rotated 180 degrees, by minimizing parasitic capacitance effects and voltage drops across pixel electrodes.
Implementation Method 1
reducing differential kickback voltage by altering the parasitic capacitance and voltage variations during forward and backward scanning
Data Source
AI summary
A display apparatus includes; a display panel including a plurality of data lines which receive a data signal, a plurality of gate lines which receive a gate signal and a plurality of pixels, a data driving circuit which provides the data liens with the data signal, and a gate driving circuit which sequentially applies the gate signal to the plurality of gate lines, wherein an area between an ith gate line and an (i+1)th gate line is divided into a plurality of areas by the plurality of data lines, and wherein each area includes first and second pixel areas which are aligned in an extension direction of the data lines, and the first pixel area and the second pixel area are provided with a first pixel connected to the ith gate line and a second pixel connected to the (i+1)th gate line, respectively.