Display Pixel Capacitance Layout for High-Definition OLED Panels
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Solution Overview
Problem
Current active matrix type organic EL display devices face challenges in achieving high-definition displays due to limitations in reducing the number of constituent pixel elements and wiring lines, leading to increased layout area and potential display defects.
Innovation Solution
The implementation of a display apparatus with a capacitance unit formed by opposing conductive layers, which allows for the reduction of pixel layout area and improved efficiency in pixel arrangement, utilizing a conductive layer connected to a power supply and a pixel electrode to form an auxiliary capacitance without using semiconductor layers, thereby enhancing space utilization and display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional pixel circuit structures are used with multiple semiconductor layers and complex wiring, then the display device achieves basic functionality, but the layout area increases and manufacturing complexity increases
Solution Approach 1:
The patent merges the auxiliary capacitance function with existing conductive layers (power supply lines or signal lines) that already pass through the pixel region. Instead of adding separate capacitance structures, the invention utilizes the electric field between existing conductive layers to provide capacitance functionality, thereby reducing the number of discrete components while maintaining display functionality.
Solution Approach 2:
The patent makes existing conductive layers serve dual purposes: their primary function (power supply or signal transmission) plus an auxiliary capacitance function. The conductive layers are designed to provide both electrical connection and capacitive storage, eliminating the need for dedicated capacitance structures and reducing overall pixel complexity.
2Area of stationary object
If the number of wiring lines is reduced to achieve high-definition display, then the layout area decreases, but the complexity of signal routing and pixel circuit integration increases
Solution Approach 1:
The patent combines multiple wiring functions into fewer conductive layers. By using the same conductive layers for both signal transmission and capacitance formation, the invention reduces the total number of wiring lines required while maintaining all necessary electrical functions, thereby simplifying the manufacturing process.
Solution Approach 2:
The patent transitions from planar wiring to three-dimensional conductive layer stacking. By utilizing vertical stacking of conductive layers with insulating layers in between, the invention achieves capacitance formation without requiring additional lateral wiring, thus reducing layout area while maintaining manufacturing feasibility through standardized layered fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables high-definition display with reduced pixel layout area and improved display quality by efficiently arranging conductive layers and pixel electrodes, minimizing display defects and enhancing image clarity.
Implementation Method 1
a first conductive layer and a second conductive layer which are opposed to each other and form a capacitance unit
Data Source
AI summary
According to one embodiment, a display apparatus includes a plurality of semiconductor layers, a first insulation film, a first conductive layer, a second insulation film and a display element includes a second conductive layer. The first conductive layer and the second conductive layer are opposed to each other to form a capacitance unit.