Display Pixel Circuit Layout for Signal Coupling Suppression
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Solution Overview
Problem
Existing display devices face challenges in increasing resolution without deteriorating image quality, as higher pixel integration leads to issues such as signal line coupling and interference.
Innovation Solution
The display device incorporates a novel design with overlapping and parallel signal lines, including a shielding electrode connected to the initializing voltage line, which reduces coupling and interference, and uses transistors with different semiconductor materials to enhance stability and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If more pixels are arranged in a limited area to increase resolution, then image clarity and vividness improve, but signal line coupling and interference increase causing image quality deterioration
Solution Approach 1:
The patent introduces an initializing voltage line as an intermediary element between existing signal lines. This initializing voltage line acts as a mediator that reduces coupling and interference between adjacent signal lines by providing a controlled voltage potential, thereby mitigating the harmful electromagnetic coupling effects while allowing higher pixel density for improved resolution
Solution Approach 2:
The patent extracts the signal line coupling problem from the overall system by specifically identifying and addressing it through the initializing voltage line. By separating the initialization function from other signal functions, the patent isolates and resolves the coupling issue without affecting the overall pixel arrangement and resolution
2Area of stationary object
If signal lines are placed closer together to increase pixel integration, then device area utilization improves, but electromagnetic interference between lines increases
Solution Approach 1:
The initializing voltage line serves as a mediator structure positioned between closely spaced signal lines. By introducing this intermediate element, the patent reduces electromagnetic interference between adjacent signal lines while maintaining high pixel integration density, as the initializing voltage line acts as an electromagnetic shield and reference potential
3Ease of manufacture
If traditional single-layer transistor design is used, then manufacturing process is simple, but image quality deteriorates due to insufficient signal control
Solution Approach 1:
The patent transitions from a traditional single-layer transistor design to a multi-layer transistor structure. By adding vertical dimensionality with multiple semiconductor layers and corresponding gate electrodes, the patent achieves better signal control and transistor performance without significantly complicating the manufacturing process, as the additional layers follow similar fabrication steps
Data Source
AI summary
A display device includes a first semiconductor layer disposed on a substrate; a first insulating layer disposed on the first semiconductor layer; a scan line disposed on the first insulating layer; a second insulating layer on the scan line; an inverted scan line on the second insulating layer; a third insulating layer disposed on the inverted scan line; a second semiconductor layer disposed on the third insulating layer; a fourth insulating layer disposed on the second semiconductor layer; an initializing voltage line disposed on the fourth insulating layer and overlapping the scan line; a first transistor including a channel disposed in the first semiconductor layer and receiving a gate signal through the scan line; and a second transistor including a channel disposed in the second semiconductor layer and receiving a gate signal through the inverted scan line.