Display Device Pixel Layout for Sensing Area Optimization
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Solution Overview
Problem
Display devices face challenges in reducing power consumption while maintaining light-emitting efficiency and resolution, particularly in the layout design around sensing areas.
Innovation Solution
The display device incorporates a unique pixel layout with additional data lines and pixel circuits in specific areas, optimizing the spacing and connection wiring to reduce power consumption and complexity, featuring a central axis with varying spacing and connection directions for data lines and light-emitting elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If additional data lines and pixel circuits are added around the sensing area, then light-emitting efficiency and resolution are improved, but device complexity increases
Solution Approach 1:
The display panel is divided into a first area (sensing area) and a second area (non-sensing area). The second area is further segmented into first and second side areas around a central axis. Different pixel circuit configurations are applied to different segments: normal pixels in the first rows and non-normal pixels in the second rows, with non-normal pixels including additional connection wirings. This segmentation allows optimized layout for each region without uniformly increasing complexity across the entire display.
Solution Approach 2:
Different pixel circuit types are deployed in different locations: normal pixels are placed in first rows of the second area, while non-normal pixels with extended connection wirings are placed in second rows. The additional data lines are positioned at specific locations with larger spacing from the central axis. This local differentiation optimizes the balance between resolution enhancement and complexity control in specific regions without compromising the overall display performance.
2Productivity
If additional data lines and pixel circuits are added around the sensing area, then light-emitting efficiency is improved, but power consumption increases
Solution Approach 1:
Instead of uniformly adding additional data lines and pixel circuits across the entire display, the invention applies partial action by limiting the additional components to specific regions (second area only) and specific rows (second rows only). The additional data lines are added only where needed to support non-normal pixels, avoiding unnecessary components in the first area and first rows. This partial approach enhances light-emitting efficiency in critical regions while minimizing the overall power consumption increase.
3Productivity
If spacing between data lines and central axis is increased, then light-emitting efficiency is improved, but device complexity increases
Solution Approach 1:
The invention introduces asymmetry in the data line spacing configuration. The additional data lines are positioned at asymmetric locations relative to the central axis, with specifically larger spacing in certain regions. This asymmetric arrangement optimizes light-emitting efficiency by providing adequate spacing for connection wirings in non-normal pixels while avoiding uniform expansion that would increase overall device complexity. The asymmetric placement allows efficient use of space in critical areas without proportionally increasing complexity throughout the entire display.
Data Source
AI summary
Disclosed is a display device including a display panel that includes a first area and a second area. The second area is divided into a first side area and a second side area around a central axis. The display panel includes a first side normal pixel disposed in each of first and second rows of the first side area, a first side non-normal pixel disposed in the second row among the first and second rows of the first side area, a second side normal pixel disposed in each of first and second rows of the second side area, and a second side non-normal pixel disposed in the first row among the first and second rows of the second side area. Each of the first side non-normal pixel and the second side non-normal pixel further includes a connection wiring connecting a data line and a pixel circuit to each other.