Display Pixel Circuit Layout Using Oxide TFT and Shared Capacitor Layer
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Solution Overview
Problem
Display devices face challenges in achieving high integration density, low power consumption, and reduced process time and cost due to the increasing number of thin film transistors required for accurate luminescence control, which existing technologies have not adequately addressed.
Innovation Solution
A display apparatus is designed with a combination of thin film transistors, including a silicon semiconductor and an oxide semiconductor, along with a storage capacitor, where the second semiconductor layer and one of the storage capacitor electrodes are on the same layer, and a gate insulating layer is used to enhance integration density and reduce processing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of thin film transistors is increased to accurately control luminescence intensities, then the control precision is improved, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent merges the gate electrode and one electrode of the storage capacitor into a single structure, reducing the total number of transistor components while maintaining the necessary control functionality for luminescence intensity regulation
Solution Approach 2:
The gate electrode serves dual functions as both the gate control electrode for the thin film transistor and as an electrode for the storage capacitor, enabling one structure to perform multiple electrical functions simultaneously
2Measurement precision
If more thin film transistors are used for accurate luminescence control, then the control precision is improved, but the manufacturing cost increases
Solution Approach 1:
By combining the gate electrode and storage capacitor electrode into one structure, the patent reduces the number of fabrication steps and material deposits required, directly lowering manufacturing costs while preserving control precision
Solution Approach 2:
The patent utilizes vertical stacking to arrange the gate electrode and storage capacitor in overlapping regions, effectively using the vertical dimension to reduce horizontal space requirements and simplify the manufacturing layout
3Measurement precision
If more thin film transistors are used for accurate luminescence control, then the control precision is improved, but the process time increases
Solution Approach 1:
The merged gate electrode and storage capacitor electrode are formed in a single fabrication step, eliminating sequential processing steps and reducing overall manufacturing cycle time while maintaining the precision control capability
Solution Approach 2:
The storage capacitor electrode is formed simultaneously with the gate electrode rather than in a subsequent step, performing the capacitor formation action in advance during the same processing cycle
4Measurement precision
If more thin film transistors are used for accurate luminescence control, then the control precision is improved, but the integration density decreases
Solution Approach 1:
The patent transitions from a planar arrangement to a vertical stacked arrangement, utilizing the vertical dimension to overlap the gate electrode and storage capacitor, thereby reducing the horizontal area occupied by each pixel unit
Solution Approach 2:
By merging the gate electrode and storage capacitor electrode, the patent reduces the total component count and the space required for interconnections, improving integration density while maintaining control precision
Data Source
AI summary
A display apparatus includes a substrate including a display area; a first thin film transistor arranged on the display area of the substrate and having a first semiconductor layer including a silicon semiconductor and a first gate electrode insulated from the first semiconductor layer by a first gate insulating layer; a second thin film transistor arranged on the display area of the substrate and having a second semiconductor layer including an oxide semiconductor and a second gate electrode insulated from the second semiconductor layer; and a storage capacitor at least partially overlapping the first thin film transistor and having a lower electrode and an upper electrode, wherein the second semiconductor layer and one of the lower electrode and the upper electrode are arranged on a same layer.