Display Pixel Circuit Layout With Parallel Storage Capacitors
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Solution Overview
Problem
Current display technologies, such as LCDs and OLEDs, face challenges in achieving high efficiency and resolution due to the difficulty in manufacturing and arranging small LED chips effectively for high-resolution micro-LED displays.
Innovation Solution
The proposed display apparatus includes a substrate with a light-emitting device, a driving transistor, power supply lines, and conductive patterns that form capacitors in parallel, optimizing the electrical characteristics and arrangement of sub-pixels to enhance capacitance and reduce resistance, thereby improving display efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If micro-LED chips are used to manufacture high-resolution display apparatus, then display resolution is improved, but manufacturing difficulty and transfer technology requirements increase
Solution Approach 1:
The patent uses transfer technology to create a master template with LED chips arranged in a specific pattern, then transfers this pattern to the substrate. This copying approach simplifies the manufacturing process by standardizing the placement procedure and enabling mass production of high-resolution displays without requiring manual positioning of each micro-LED chip.
Solution Approach 2:
The patent introduces a transfer substrate as an intermediary component that temporarily holds the micro-LED chips in the correct arrangement before transferring them to the final display substrate. This intermediary structure facilitates the complex transfer process by providing a stable platform for chip mounting and alignment, reducing the overall manufacturing difficulty.
2Manufacturing precision
If small LED chips are used for high-resolution display, then display quality is improved, but efficiency of manufacturing decreases
Solution Approach 1:
The patent merges multiple small LED chips onto a single transfer substrate in one manufacturing step, rather than placing them individually. This batch processing approach significantly improves manufacturing efficiency while maintaining the high resolution required for quality displays, as entire arrays of micro-LED chips are transferred simultaneously in a single operation.
Solution Approach 2:
The patent performs preliminary arrangement and bonding of micro-LED chips to the transfer substrate before the actual transfer to the display substrate. This preliminary action ensures that all chips are correctly positioned and secured in advance, enabling rapid transfer and improving overall manufacturing efficiency while maintaining display quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases the capacitance of storage capacitors and reduces the total resistance of power supply lines, leading to improved electrical characteristics and display performance.
Implementation Method 1
the conductive pattern and the first power supply line constitute a first capacitor, wherein the conductive pattern and the second power supply line constitute a second capacitor, and wherein the first capacitor and the second capacitor are connected in parallel
Data Source
AI summary
A display apparatus includes a substrate, a light-emitting device provided on the substrate, a driving transistor device configured to control the light-emitting device, a first power supply line electrically connected to a source region of the driving transistor device, a conductive pattern electrically connected to a gate electrode of the driving transistor device, and a second power supply line electrically connected to the first power supply line, wherein the conductive pattern and the first power supply line constitute a first capacitor, and the conductive pattern and the second power supply line constitute a second capacitor, wherein the first capacitor and the second capacitor are connected in parallel.