Display Pixel Power Line Layout for High-Density Capacitor Area
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Solution Overview
Problem
Existing display devices face challenges in minimizing the number of stacked circuit layers while increasing pixel density and securing capacitor area, particularly as pixel sizes become smaller.
Innovation Solution
The display device incorporates a design with specific power line configurations, including first and second driving power lines, initialization and reference power lines, and horizontal power lines, which are electrically connected to unit pixels, allowing for a minimized number of stacked circuit layers and increased pixel density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the size of individual pixels is reduced to increase resolution, then pixel density is improved, but the area available for capacitor and circuit components deteriorates
Solution Approach 1:
The patent merges the capacitor electrode with the common electrode structure, allowing the same electrode to serve dual functions. This integration eliminates the need for separate capacitor electrode structures, thereby preserving capacitor area while maintaining high pixel density. The common electrode is configured to function as both the common electrode for the display and the capacitor electrode for charge storage.
Solution Approach 2:
The patent implements multi-functionality by designing the common electrode to simultaneously serve as the common electrode for voltage application across the display and as the capacitor electrode for charge storage. This universal design allows a single structure to fulfill multiple functions, optimizing space utilization in high-resolution displays where pixel size is reduced.
2Reliability
If more circuit layers are stacked to provide comprehensive power line connections, then electrical connectivity is improved, but device complexity increases
Solution Approach 1:
The patent combines multiple power line functions into a reduced number of stacked circuit layers. By integrating the capacitor electrode with the common electrode and optimizing the arrangement of first and second driving power lines, the design achieves comprehensive electrical connectivity while minimizing the number of required circuit layers, thus reducing overall device complexity.
Solution Approach 2:
The patent optimizes the spatial arrangement of power lines by utilizing different extension directions (first direction and second direction) for first and second driving power lines. This dimensional optimization allows efficient electrical connectivity to be achieved with fewer stacked layers by strategically routing power lines in multiple directions rather than requiring additional vertical layers.
Data Source
AI summary
A display device includes, a first unit pixel including at least two light emitting elements, a second unit pixel including at least two light emitting elements, and a power line applying a voltage to the first and second unit pixels, the first and second unit pixels are side by side in a direction different from an extension direction of the power line, the power line includes first driving power lines, second driving power lines, an initialization power line, a first reference power line, and a second reference power line, the second driving power lines, the initialization power line, the first reference power line, and the second reference power line are each electrically connected to the first and second unit pixels through a wire, and the first driving power lines include wires electrically connected to each of the first unit pixel and the second unit pixel.