Display Substrate Pixel Layout for Lower Reset Line Load

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Solution Overview

Problem

Existing display substrates using LTPO technology face display defects like Mura under low grayscale due to high load on reset control signal lines, which affects brightness uniformity in high-frequency driving.

Innovation Solution

Optimize the pixel circuit layout by ensuring that the orthographic projections of initialization signal lines do not overlap with the reset control signal line, reducing the load on the reset control signal line and improving the layout efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a transparent electrode is removed from a display device, then manufacturing complexity and cost are reduced, but the device becomes susceptible to static electricity damage and requires additional protective structures

Engineering Contradiction:
Improvestructure complexityVSAvoidstatic electricity resistance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces a charge control layer as an intermediary component between the emission layer and the electrode-free structure. This layer acts as a mediator that captures and controls static electricity charges, preventing them from damaging the organic light-emitting layers while maintaining the transparent electrode-free design. The charge control layer with LUMO levels of -2 eV to -4 eV serves as a protective interface that manages charge distribution.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the electrode function by separating the charge control functionality from the traditional transparent electrode. The charge control layer is divided into multiple layers with different LUMO levels (first charge control layer at -2 to -3 eV, second charge control layer at -3 to -4 eV), allowing independent optimization of charge management without requiring a continuous transparent conductive oxide layer.

Inventive Principle:
Principle #1Segmentation

2Productivity

If the LUMO level of a charge control layer is lowered to improve electron injection, then electron injection efficiency increases, but thermal stability decreases due to increased electron injection from electrode to HIL

Engineering Contradiction:
Improveelectron injection efficiencyVSAvoidthermal stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The patent applies local quality by creating different charge control layers with distinct LUMO levels at different locations within the device structure. The first charge control layer has LUMO levels of -2 to -3 eV optimized for electron injection from the electrode, while the second charge control layer has LUMO levels of -3 to -4 eV positioned closer to the emission layer. This spatial differentiation of energy levels allows each layer to perform its specific function optimally without compromising overall device stability.

Inventive Principle:
Principle #3Local quality

3Productivity

If a deep hole injection layer is used to improve hole injection, then hole injection efficiency increases, but the device becomes sensitive to moisture and oxygen requiring encapsulation

Engineering Contradiction:
Improvehole injection efficiencyVSAvoidmoisture and oxygen sensitivity
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent converts the potential harm of deep hole injection layer sensitivity to moisture and oxygen by implementing multi-layer encapsulation structures. The deep hole injection layer with HOMO levels of -5 to -7 eV is protected by stacking multiple encapsulation layers including inorganic barrier layers and organic protective layers, transforming the vulnerability into a design feature where the sensitive layer is shielded while maintaining its high hole injection performance.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentEP4517730B1Display substrate and display apparatus
Publication Date: 2026.05.06 BOE TECHNOLOGY GROUP CO LTD
  • EP4517730B1 patent drawingFigure 1A~1B
  • EP4517730B1 patent drawingFigure 2~3A
  • EP4517730B1 patent drawingFigure 3B~3C

AI summary

Provided are a display substrate and a display apparatus. The display substrate comprises: a base substrate, a plurality of sub-pixels and a plurality of signal lines. Each sub-pixel comprises a light-emitting element and a pixel circuit, and the pixel circuit comprises a plurality of transistors and a storage capacitor; the plurality of signal lines comprise a first initialization signal line, a reset control signal line and a second initialization signal line; the plurality of transistors comprise a first reset transistor and a second reset transistor, a gate electrode of the first reset transistor and a gate electrode of the second reset transistor are electrically connected to the reset control signal line; and an orthographic projection of at least one of the first initialization signal line and the second initialization signal line on the base substrate does not overlap with an orthographic projection of the reset control signal line on the base substrate. The distance in a second direction between a first initialization signal line or a second initialization signal line and a reset control signal line is increased, such that the load of the reset control signal line is reduced, and phenomena such as mura which may occur in a display substrate can be alleviated, thereby facilitating the signal control for a pixel circuit.