Display Pixel Layout Using Shared Data Lines and Staggered Gate Timing
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Solution Overview
Problem
Existing display devices face challenges in reducing power consumption and bezel width while maintaining high resolution and light-emitting efficiency.
Innovation Solution
The display device employs a novel pixel layout with overlapping active periods for gate signals and separate data signal application to adjacent pixels, utilizing bridge electrodes for connecting light-emitting elements, and includes a processor to control these operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If a single data line sequentially receives multiple data signals for adjacent pixels, then the number of data lines is reduced and bezel width is reduced, but power consumption increases due to repeated signal transmission
Solution Approach 1:
The data transmission process is segmented into two distinct phases: a first period where the first data signal is applied to the first pixel circuit, and a second period where the second data signal is applied to the second pixel circuit. This temporal segmentation allows the single data line to serve multiple pixels without simultaneous signal conflicts, reducing the need for multiple data lines and thereby reducing bezel width while managing power consumption through controlled signal transmission timing.
Solution Approach 2:
The data line operates in periodic cycles, sequentially transmitting different data signals to different pixel circuits at different time periods. The first data signal is transmitted during the first period, and the second data signal is transmitted during the second period. This periodic action enables efficient use of a single data line for multiple pixels, reducing the physical space required for data lines and thus reducing bezel width.
2Manufacturing precision
If pixel circuits are arranged in the same pixel row with adjacent layout, then resolution and light-emitting efficiency are improved, but device complexity increases due to overlapping gate signal periods
Solution Approach 1:
The gate signal control system dynamically adjusts the activation periods for different pixel circuits. The first gate signal is activated during the first period, while the second gate signal is activated during the second period. This dynamic timing control allows adjacent pixel circuits to be driven independently despite their close physical arrangement, enabling high resolution while managing control complexity through time-division multiplexing.
Solution Approach 2:
The pixel circuits are pre-configured with specific gate signal activation periods. The first pixel circuit is configured to respond to gate signals during the first period, and the second pixel circuit is configured to respond during the second period. This preliminary configuration simplifies the control mechanism by establishing clear temporal boundaries for each pixel circuit's operation, reducing the complexity of real-time control while maintaining high resolution through precise pixel positioning.
Data Source
AI summary
A display device includes a first data line extending in a first direction, and configured to sequentially receive a first data signal and a second data signal, a first gate line configured to receive a first gate signal activated for a first active period, a second gate line configured to receive a second gate signal activated for a second active period, a first pixel including a first pixel circuit connected to the first data line and to the first gate line, and a first light-emitting element connected to the first pixel circuit, and a second pixel including a second pixel circuit connected to the first data line and to the second gate line, and a second light-emitting element connected to the second pixel circuit, wherein the first and second pixel circuits are in a same pixel row adjacent to each other in a second direction.