Display Pixel Test Structures for Defect Detection

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Solution Overview

Problem

It is challenging to accurately and easily check for defects in the wiring or pads of a display apparatus, which can degrade the quality of the image displayed.

Innovation Solution

A display apparatus is designed with specific pixel arrangements and test data lines, along with test transistors and pads, to apply signals and analyze images for defects, such as short-circuits between pads or connection lines, by using turn-on and turn-off signals to identify abnormal operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If display resolution is increased, then image quality is improved, but the probability of short-circuits in wiring increases

Engineering Contradiction:
Improveimage qualityVSAvoidshort-circuit probability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent divides the display apparatus into multiple test regions with different pixel arrangements (e.g., regions with 1T1C, 2T1C, 3T1C pixel structures). By segmenting the display area into distinct test zones, the patent can independently test wiring and pads in each region, thereby improving the detectability of short-circuits without compromising overall image quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent incorporates test transistors and test pads that are activated before final product delivery. These preliminary test structures allow manufacturers to detect wiring defects and short-circuits in advance, enabling quality control measures to be taken before the display apparatus reaches the customer, thus maintaining high reliability despite increased resolution.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If test structures are added to detect defects, then defect detection accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvedefect detection accuracyVSAvoidtest structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges test functions with existing pixel structures by using shared data lines and gate lines. Test transistors are integrated into the pixel array structure, and test pads are combined with regular pixel pads. This merging approach allows defect detection without adding separate, independent test systems, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent designs test structures that serve multiple functions: the same data lines and gate lines are used for both normal pixel operation and defect testing. Test transistors can function as switching elements during normal operation and as test activation elements during quality control. This multi-functionality reduces the need for dedicated test-only components, limiting complexity increase.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240237436A9Display apparatus and method of inspecting defects of the same
Publication Date: 2024.07.11 SAMSUNG DISPLAY CO LTD
  • US20240237436A9 patent drawing
  • US20240237436A9 patent drawing
  • US20240237436A9 patent drawing

AI summary

A display apparatus includes: a first column including blue pixels and red pixels alternately located along a first direction; a second column located in a second direction crossing the first direction from the first column, and including green pixels located along the first direction; a third column located in the second direction from the second column, and including red pixels and blue pixels alternately located along the first direction; a fourth column located in the second direction from the third column, and including green pixels located along the first direction; a first test data line extending in the second direction; a second test data line extending in the second direction; a third test data line extending in the second direction; and a fourth test data line extending in the second direction.