Display Panel Pixel Timing for Partitioned Refresh Flicker Control

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Solution Overview

Problem

Current display panels with partitioned frequency division function experience varying brightness and flicker across different partitions due to different refresh rates, leading to uneven display and reduced display effect.

Innovation Solution

A display panel with pixel circuits that include a drive circuit, gate reset circuit, and threshold compensation circuit, where the active pulse phases of threshold compensation and gate reset signals are partially overlapped to adjust the overlap time, enhancing brightness synchronization and reducing flicker across display areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If partitioned frequency division is implemented with different refresh rates in different partitions, then driving power consumption is reduced, but brightness uniformity deteriorates and flicker occurs

Engineering Contradiction:
Improvedriving power consumptionVSAvoidbrightness uniformity
Core Design Contradiction:
Use of energy by stationary objectVSIllumination intensity

Solution Approach 1:

The gate reset circuit performs preliminary reset action on the drive transistor before data writing, and the threshold compensation circuit performs threshold voltage compensation in advance. This preliminary action ensures that transistors in different partitions start from a consistent baseline state, compensating for the effects of different refresh rates and preventing brightness uniformity deterioration while maintaining partitioned frequency division power savings

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the timing parameters of control signals by adjusting the overlap time between gate reset signal and threshold compensation signal in different partitions. By dynamically adjusting these timing parameters according to partition-specific refresh rates, the system maintains consistent transistor states across partitions despite different refresh rates, thereby preserving brightness uniformity while reducing power consumption

Inventive Principle:
Principle #35Parameter changes

2Use of energy by stationary object

If different refresh rates are applied in different partitions, then power consumption is reduced, but display smoothness deteriorates due to flicker

Engineering Contradiction:
Improvedriving power consumptionVSAvoiddisplay smoothness
Core Design Contradiction:
Use of energy by stationary objectVSStability of the object's composition

Solution Approach 1:

By performing gate reset and threshold compensation as preliminary actions before each refresh cycle, the patent ensures that all partitions start from a stable, consistent state. This preliminary stabilization action prevents the accumulation of state differences that would cause flicker, maintaining display smoothness while allowing different refresh rates for power savings

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The threshold compensation circuit provides feedback by measuring and compensating for threshold voltage variations in the drive transistor. This feedback mechanism ensures that despite different refresh rates in different partitions, the actual operating state of transistors remains consistent, preventing flicker and maintaining display stability while enabling power-saving partitioned refresh

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20260073853A1Display panel, driving method, and display device
Publication Date: 2026.03.12 XIAMEN TIANMA DISPLAY TECH CO LTD
  • US20260073853A1 patent drawing
  • US20260073853A1 patent drawing
  • US20260073853A1 patent drawing

AI summary

Provided are a display panel, a driving method, and a display device. The refresh rate of the first display area is not equal to the refresh rate of the second display area. In the first display area and/or the second display area, a pixel circuit satisfying the following exists: The active pulse phase of the threshold compensation control signal and the active pulse phase of the gate reset control signal at least partially overlap. The overlap time between the active pulse phase of the threshold compensation control signal and the active pulse phase of the gate reset control signal in the pixel circuit of the first display area is not equal to the overlap time between the active pulse phase of the threshold compensation control signal and the active pulse phase of the gate reset control signal in the pixel circuit of the second display area.