Display Device Polarity Reversal Border Shifting

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Solution Overview

Problem

Existing line reversal drive methods for liquid crystal display devices face challenges in simultaneously mitigating flicker and reducing electric power consumption, often requiring complex circuit configurations to achieve compatibility between these two goals.

Innovation Solution

A display device and method that implement a polarity signal reversal in an N line period cycle asynchronous with the vertical start pulse, with one frame period defined by a number of vertical clocks not being a multiple of N, allowing for a simple circuit configuration that shifts the polarity reversal border in each frame, thereby reducing flicker and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If line reversal drive is implemented to reduce flicker, then flicker mitigation is improved, but electric power consumption increases

Engineering Contradiction:
ImproveflickerVSAvoidelectric power consumption
Core Design Contradiction:
Object-affected harmful factorsVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by implementing line reversal drive that inverts the polarity of pixel signals at regular intervals (every N lines). This periodic polarity inversion mitigates flicker by preventing charge accumulation in the liquid crystal molecules, while the period is carefully chosen to balance flicker reduction with power consumption.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent changes the parameter of signal polarity periodically, switching between positive and negative polarities. By controlling the inversion period (N lines) and synchronizing it with the frame rate, the system achieves flicker mitigation while managing power consumption through optimized parameter selection.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If block border shifting is implemented every frame to mitigate flicker, then flicker mitigation is improved, but device complexity increases

Engineering Contradiction:
ImproveflickerVSAvoiddrive circuit configuration
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent segments the display into blocks of N lines for polarity reversal. By dividing the display area into manageable segments and applying polarity inversion to each segment periodically, the system achieves flicker reduction without requiring complex global control circuits. Each segment can be controlled independently with simple timing logic.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces dynamic behavior by shifting the block border position each frame. Instead of fixed polarity reversal lines, the reversal boundaries move dynamically across frames, which mitigates flicker more effectively. This dynamic approach is achieved through simple timing control rather than complex circuitry.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9019258B2Display device, display drive method and electronic apparatus
Publication Date: 2015.04.28 MAGNOLIA WHITE CORP
  • US9019258B2 patent drawing
  • US9019258B2 patent drawing
  • US9019258B2 patent drawing

AI summary

Provided is a display device including a pixel array forming by arranging a plurality of pixels whose display grayscale are controlled according to a pixel signal written, a signal line drive unit that outputs a pixel signal, to a plurality of signal lines, with a polarity according to a polarity signal, a scan line drive unit that drives the plurality of signal lines and performs a writing of the pixel signal output to the signal line into the pixels, a polarity signal generation unit that generates the polarity signal instructing the polarity of the pixel signal to be reversed, and supplies the result to the signal line drive unit, and a frame cycle set unit that generates the vertical start pulse in such a manner that a period of the number of vertical clocks that is not a multiple of the N is one frame period.