Display Port Interface Self-Refresh Synchronization via Auxiliary Link
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Solution Overview
Problem
Existing display port interfaces face challenges in efficiently managing synchronization and power management between processors and displays, particularly during self-refresh modes, leading to issues like display tearing and inefficient power usage.
Innovation Solution
The implementation of a display port interface with a primary and auxiliary link, including a hot plug detect link, allows for synchronization signals to be sent between processors, enabling efficient clock recovery and power management, such as through phase-locked loops and specific encoding methods, to maintain vertical synchronization and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the display port interface uses traditional synchronization methods during self-refresh modes, then power consumption is reduced, but display tearing and synchronization issues occur
Solution Approach 1:
The patent introduces an auxiliary link as an intermediary communication channel between source and sink processors. This auxiliary link carries synchronization packets that enable the sink to maintain accurate timing information during self-refresh modes without requiring continuous data transmission on the main link, thus resolving the contradiction between power savings and synchronization stability.
Solution Approach 2:
The patent implements preliminary synchronization actions by having the sink processor send synchronization requests and the source processor provide timing information before self-refresh modes begin. This preliminary exchange of synchronization data allows the system to enter low-power states while maintaining synchronization accuracy, preventing display tearing during the self-refresh period.
2Reliability
If the interface transmits continuous data to maintain synchronization, then display tearing is eliminated, but power consumption increases
Solution Approach 1:
The patent implements periodic synchronization actions instead of continuous data transmission. The auxiliary link transmits synchronization packets at specific intervals (e.g., at the beginning of each frame or at defined time points), which is sufficient to maintain synchronization during self-refresh modes while allowing the main link to remain inactive for extended periods, thereby reducing power consumption.
Solution Approach 2:
The patent segments the communication function into two separate channels: the main link for data transmission and the auxiliary link for synchronization control. This segmentation allows the synchronization function to be independently managed through periodic packets on the auxiliary link, while the main link can enter low-power states, resolving the contradiction between maintaining synchronization and reducing power consumption.
3Use of energy by moving object
If the display port enters self-refresh mode to save power, then energy usage is reduced, but clock recovery becomes inefficient
Solution Approach 1:
The patent performs preliminary clock synchronization actions before entering self-refresh mode. The auxiliary link exchanges timing reference information and synchronization packets in advance, allowing the sink processor to maintain accurate clock timing without continuous data streams. This preliminary action eliminates the need for time-consuming clock recovery when exiting self-refresh mode.
Solution Approach 2:
The auxiliary link serves as an intermediary channel that maintains clock synchronization information during self-refresh modes. By carrying timing reference packets and synchronization data on this separate channel, the system preserves clock timing accuracy without requiring the main data link to remain active, thus avoiding clock recovery delays when resuming normal operation.
Data Source
AI summary
Embodiments of an apparatus for implementing a display port interface are disclosed. The apparatus may include a source processor and a sink processor coupled through an interface. The sink processor may be operable to send a synchronization signal to the source processor through the interface. The source processor may be operable, dependent upon the synchronization signal, to send data to the sink processor.