Display Substrate Reset-Line Layout for Compact High-Resolution Panels
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Solution Overview
Problem
The display industry faces challenges in reducing power consumption of display panels while maintaining high-resolution characteristics, with existing technologies like LTPO not being widely adopted.
Innovation Solution
A display substrate design featuring separate layers for first and second reset signal lines, with overlapping projections to reduce wiring space and incorporate a bent portion in power supply voltage lines, along with a specific arrangement of pixel driving circuits and signal lines to enhance display quality and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If separate layers for first and second reset signal lines are used, then wiring layout space is reduced, but layer complexity increases
Solution Approach 1:
The patent transitions from planar routing to multi-layer routing by placing first reset signal lines in one layer and second reset signal lines in a different layer. This dimensional change allows signal lines that would otherwise need to be routed separately in the same layer to overlap in the planar view, significantly reducing wiring layout space while managing complexity through systematic layer assignment.
Solution Approach 2:
The patent implements nesting by having the orthographic projection of signal lines in one layer overlap with signal lines in another layer. This creates a nested arrangement where multiple signal paths are contained within the same planar footprint but separated in the vertical dimension, effectively reducing the overall wiring area.
2Reliability
If bent portions are added to power supply voltage lines, then display quality is improved, but manufacturing complexity increases
Solution Approach 1:
The patent introduces bent portions (curved segments) in power supply voltage lines instead of straight connections. These curved portions serve as parasitic capacitance elements that compensate for threshold voltage shifts in transistors, improving display quality. The curvature is integrated into the manufacturing process as a standard design feature rather than a complex additional component.
3Area of stationary object
If overlapping regions of reset signal lines are increased, then wiring space is reduced, but signal interference risk increases
Solution Approach 1:
The patent resolves the signal interference issue by separating overlapping signal lines into different layers. While the orthographic projections overlap in the planar view to save space, the actual signal lines are physically separated in the vertical dimension, preventing electromagnetic interference while maintaining compact layout.
Data Source
AI summary
A display substrate is provided. The display substrate includes a base substrate and a plurality of reset signal lines. The base substrate includes a display region, the display region includes a plurality of sub-pixels arranged in array, each of the plurality of sub-pixels includes a pixel driving circuit and a light-emitting element. The plurality of reset signal lines extend in a first direction, the plurality of reset signal lines include a plurality of first reset signal lines for providing a first reset signal and a plurality of second reset signal lines for providing a second reset signal, and one of the plurality of first reset signal lines and one of the plurality of second reset signal lines are respectively connected to pixel driving circuits of a plurality of sub-pixels located in a same row.