Display Substrate Reset-Line Layout With Shared Shift Registers
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Solution Overview
Problem
Existing display technologies face challenges in reducing the frame width of display products while maintaining effective threshold compensation time and minimizing display differences between adjacent rows of pixel regions.
Innovation Solution
The display substrate design includes a configuration where (N+M) first shift register units are arranged along a first direction, with signal transmission lines overlapping orthographically with at least one shift register unit, allowing connections to reset lines without occupying space between units, thereby reducing frame width and enhancing threshold compensation time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If signal transmission lines are routed between shift register units, then connections to reset lines are achieved, but frame width increases and space is occupied between units
Solution Approach 1:
The signal transmission line is routed above the shift register units in the vertical dimension rather than between them in the horizontal dimension. Specifically, the transmission line is positioned above the output transistor of at least one shift register unit, allowing the signal to be transmitted from the output terminal through the transmission line to the reset line without occupying space between adjacent shift register units, thereby reducing frame width while maintaining connection functionality.
Solution Approach 2:
The signal transmission line is divided into multiple segments: a first segment connected to the output terminal of the shift register unit, and a second segment connected to the reset line. These segments are spatially separated and routed through different regions, with the first segment positioned above the output transistor and the second segment routed to the reset line, allowing independent optimization of each segment's path to avoid interference between adjacent units.
2Length of stationary object
If shift register units are arranged in a compact configuration, then frame width is reduced, but threshold compensation time may be insufficient
Solution Approach 1:
The configuration allows dynamic adjustment of the transmission line routing to optimize both space utilization and signal transmission time. By positioning the transmission line above the output transistor and allowing it to extend horizontally across multiple unit positions, the design achieves compact vertical arrangement (reducing frame width) while maintaining sufficient horizontal signal path length (ensuring adequate threshold compensation time).
3Length of stationary object
If transmission lines are positioned above shift register units, then frame width is reduced, but signal interference may increase
Solution Approach 1:
The transmission line acts as an intermediary element that is spatially separated from both the output transistor (through vertical positioning above it) and the reset line (through segmented routing). This intermediary positioning reduces direct parasitic capacitance coupling between adjacent units while maintaining functional signal transmission, thereby reducing signal interference despite the compact horizontal arrangement.
Data Source
AI summary
A display substrate, a manufacturing method thereof and a display apparatus are provided. The display substrate includes a display region including N pixel groups in a first direction and a peripheral region; each pixel group includes at least one row of pixel regions; the display substrate includes: first and second reset lines; wherein each row of pixel regions corresponds to one first reset line and one second reset line; (N+M) first shift register units are arranged along the first direction; an output terminal of an ith first shift register unit is connected to a second reset line corresponding to an (i−M)th row of pixel regions; an output terminal of a jth first shift register unit is connected to a first reset line corresponding to a jth row of pixel regions through a signal transmission line; N is an integer greater than 2, M is a preset positive integer, M+1≤i≤N+M, 1≤j≤N, and i and j are both integers; orthographic projections of the signal transmission line and at least one of the first shift register units on the base substrate overlaps with each other.