Display Resynchronization via Scanout Line Timing

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Solution Overview

Problem

Display systems face synchronization conflicts between GPUs and display systems during panel self-refresh mode due to the absence of an explicit resynchronization signal, leading to visual artifacts and latency in latency-sensitive applications, especially when operating under the embedded DisplayPort standard.

Innovation Solution

Implementing a variable refresh rate within a range below the maximum refresh rate by extending the vertical blanking region, allowing the display system to synchronize with the GPU timing using timing information exchanged before entering the panel self-refresh mode, and providing current scanout line data via side channels to determine optimal frame transmission times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the GPU enters panel self-refresh mode to conserve power by stopping frame output, then power consumption is reduced, but synchronization between GPU and display system becomes misaligned causing visual artifacts

Engineering Contradiction:
ImproveGPU power consumptionVSAvoidsynchronization accuracy
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by having the display system determine the current scanout line position before the GPU resumes frame output after panel self-refresh mode. This advance determination allows the GPU to calculate the appropriate synchronization offset and transmit the first frame at the correct timing, ensuring proper resynchronization without visual artifacts while maintaining power savings during self-refresh mode

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the GPU transmits frames at a fixed refresh rate synchronized to display system timing, then synchronization is maintained, but latency increases in latency-sensitive applications

Engineering Contradiction:
ImprovesynchronizationVSAvoiddisplay latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies dynamics by enabling the display system to dynamically adjust its refresh rate based on content characteristics and user preferences. The system can switch between fixed refresh rate modes (for synchronization stability) and variable refresh rate modes (for reduced latency), allowing optimal performance for different application scenarios. This dynamic adjustment resolves the contradiction by providing both synchronization reliability and low latency capability

Inventive Principle:
Principle #15Dynamics

3Stability of the object's composition

If the display system uses a fixed vertical blanking region duration, then timing stability is maintained, but flexibility to optimize for different refresh rates is reduced

Engineering Contradiction:
Improvetiming stabilityVSAvoidrefresh rate flexibility
Core Design Contradiction:
Stability of the object's compositionVSAdaptability or versatility

Solution Approach 1:

The patent applies parameter changes by making the vertical blanking region duration a variable parameter that can be dynamically adjusted based on the desired refresh rate. The display system calculates the appropriate blanking region duration for each refresh rate, allowing it to maintain timing stability within each mode while providing flexibility to optimize for different refresh rates. This resolves the contradiction by allowing the system to adapt parameters rather than being constrained to fixed values

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11688031B2Resynchronization of a display system and GPU after panel self refresh
Publication Date: 2023.06.27 ATI TECHNOLOGIES ULC
  • US11688031B2 patent drawing
  • US11688031B2 patent drawing
  • US11688031B2 patent drawing

AI summary

A display system receives first timing information prior to the display system entering a panel self-refresh (PSR) mode. The display system supports a range of refresh rates. Prior to the display system entering the PSR mode, first timing information indicating a first refresh rate that is lower than a maximum refresh rate supported by the display system is received by the display system. The display system then refreshes images at a second refresh rate that is less than or equal to the first refresh rate using a frame stored in a buffer prior to entering the PSR mode. In some cases, the processing unit also receives second timing information from the display system in response to initiating an exit from a panel self-refresh (PSR) mode. The second timing information indicates a current scanout line that is used to schedule transmission of a subsequent frame.