Display Parallel Processor for Configurable ROI CRC Checks

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Solution Overview

Problem

Existing display systems face limitations in supporting a large number of regions of interest (ROIs) due to fixed function hardware in display controllers, which restricts the number of display devices and complicates data integrity checks, especially when dynamic backgrounds are involved, leading to potential errors in safety-critical image portions.

Innovation Solution

Offloading ROI calculations and data integrity checks from display controllers to a parallel processor, which performs CRCs redundantly and programmably, allowing for a configurable number of ROIs, simplifying the display controller, and enhancing robustness through parallel processing and external verification.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If fixed function hardware is used in display controllers, then data integrity checks can be performed, but the number of supported regions of interest is limited and device complexity increases

Engineering Contradiction:

Improvedata integrity checkVSAvoiddisplay controller complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the data integrity checking function from the display controller by implementing CRC calculation in the parallel processor instead. This removes the burden of fixed function hardware from the display controller, reducing its complexity while maintaining the reliability of data integrity checks through the parallel processor's programmable CRC implementation.

Inventive Principle:

Principle #2Taking out (Extraction)

2Reliability

If fixed function hardware is used in display controllers, then data integrity checks can be performed, but the number of supported display devices is limited

Engineering Contradiction:

Improvedata integrity checkVSAvoidnumber of supported display devices

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The parallel processor is designed to perform multiple functions including rendering, compositing, and CRC calculation for data integrity checks. This multi-functional approach allows the system to support multiple display devices with varying requirements while maintaining reliable data integrity verification without requiring dedicated fixed function hardware for each device.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If CRC calculation is performed in display controller, then data integrity is verified, but processing speed decreases due to sequential operation

Engineering Contradiction:

Improvedata integrity verificationVSAvoidprocessing speed

Core Design Contradiction:

ReliabilityVSSpeed

Solution Approach 1:

The patent merges the CRC calculation operation with the existing parallel rendering and compositing operations in the parallel processor. By utilizing the already-active parallel processing resources for both image generation and data integrity verification simultaneously, the system achieves reliable CRC verification without sacrificing processing speed, as both functions execute in parallel rather than sequentially.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS20250307069A1Safety data integrity checking at a parallel processor of a display system

Publication Date: 2025.10.02 ADVANCED MICRO DEVICES INC

AI summary

A display system increases a number of supported regions of interest and allowing for a dynamic background image by offloading region of interest calculations and data integrity checks from a display controller to a parallel processor of the display system. The parallel processor calculates a configurable number of regions of interest of a frame and error checks each of the regions of interest before transmitting the frame to the display controller.