Display Device Scan Line Capacitance Balancing

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Solution Overview

Problem

Display devices face challenges in minimizing the difference in pulse width of scan signals due to RC delay across scan lines, leading to variations in pixel luminance and image quality.

Innovation Solution

Incorporating compensation capacitors connected to specific scan lines, where the number and distribution of capacitors are optimized to balance the capacitance across adjacent scan lines, thereby reducing RC delay and pulse width differences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the display area is formed with a notch shape to avoid overlapping with the optical sensor, then the optical sensor can be properly positioned, but the capacitance of scan lines becomes non-uniform causing RC delay differences and pulse width variations

Engineering Contradiction:
Improveoptical sensor positioningVSAvoidscan signal pulse width consistency
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by configuring different numbers of compensation capacitors for different scan lines based on their specific capacitance characteristics. Scan lines with higher capacitance (typically in the notch region) are equipped with more compensation capacitors, while scan lines with lower capacitance have fewer capacitors. This localized differentiation compensates for the non-uniform capacitance distribution caused by the notch-shaped display area, thereby equalizing the RC delay across all scan lines and ensuring consistent pulse width.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If compensation capacitors are added to balance capacitance across scan lines, then RC delay and pulse width differences are reduced, but the device complexity and manufacturing process become more complex

Engineering Contradiction:
Improvescan signal pulse width consistencyVSAvoidcompensation capacitor configuration
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent employs parameter changes by systematically varying the number of compensation capacitors connected to each scan line according to a predetermined pattern. Specifically, scan lines are grouped into sets where adjacent scan lines within each set share the same number of compensation capacitors, and this number changes in steps across different sets. This structured parameter variation achieves capacitance balancing while maintaining manufacturing feasibility through standardized configuration patterns.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively minimizes the RC delay and pulse width variations, ensuring consistent pixel luminance and improved image quality across the display device.

Implementation Method 1

compensation capacitors connected to some scan lines from among the scan lines. A sum of a capacitance of q odd scan lines or q even scan lines that are adjacent to each other from among the scan lines increases in the second direction

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11957005B2Display device
Publication Date: 2024.04.09 SAMSUNG DISPLAY CO LTD
  • US11957005B2 patent drawing
  • US11957005B2 patent drawing
  • US11957005B2 patent drawing

AI summary

A display device includes: a substrate; scan lines extending in a first direction, and arranged along a second direction crossing the first direction on the substrate; data lines extending in the second direction, and arranged along the first direction on the substrate; a display area including pixels connected to the scan lines and the data lines; and a non-display area around the display area, and including compensation capacitors connected to some scan lines from among the scan lines. A sum of a capacitance of q odd scan lines or q even scan lines that are adjacent to each other from among the scan lines increases in the second direction, where q is a positive integer.