Light Emitting Display Scan Stage Clock Configuration for Luminance Control
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Solution Overview
Problem
In multi-frequency driving of light emitting display devices, the transition from high-frequency to low-frequency regions causes abnormal luminance changes due to skipped scan clock pulses, leading to image quality deterioration.
Innovation Solution
The implementation of a light emitting display device with a specific scan stage configuration, where odd and even scan clocks are alternately provided to scan stages, and the odd second scan clock is omitted for the n+5-th scan stage connected to the n+5-th scan line at the beginning of the low-frequency region, ensuring normal data voltage charging across horizontal lines near the frequency boundary.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-frequency driving is applied to large area light emitting display devices, then productivity and energy efficiency are improved, but image quality deteriorates due to abnormal luminance changes at frequency boundaries
Solution Approach 1:
The display panel is divided into multiple scan regions (first scan region and second scan region) that are driven at different frequencies. The gate driving portion is segmented into multiple scan stages, where odd scan stages receive odd scan clocks and even scan stages receive even scan clocks. This segmentation allows independent frequency control of different regions while maintaining proper scan signal timing through selective clock pulse omission at boundary transitions.
2Use of energy by moving object
If scan clock frequency is reduced in low-frequency driving region, then energy consumption is decreased, but data voltage charging becomes incomplete causing luminance abnormalities
Solution Approach 1:
Different scan clock frequencies are applied to different spatial regions of the display panel. The first scan region operates at a higher frequency while the second scan region operates at a lower frequency. At the boundary between regions, the odd second scan clock pulses are selectively omitted to ensure that scan signals maintain proper timing and duration for complete data voltage charging, even when transitioning to lower frequency operation.
3Device complexity
If scan clock pulses are skipped during frequency transition, then timing synchronization is simplified, but data voltage charging is incomplete causing increased luminance
Solution Approach 1:
The gate driving portion is configured in advance to selectively omit specific odd second scan clock pulses (i+2-th clock pulse) when transitioning from the first scan region to the second scan region. This preliminary configuration ensures that scan signals maintain appropriate pulse widths and timing for complete data voltage charging before the transition occurs, preventing luminance abnormalities without requiring complex real-time timing adjustments.
Data Source
AI summary
A light emitting display device in which odd scan stages receive odd first and second scan clocks alternately, and even scan stages receive an even scan clock, in a multi-frequency mode in which a first region is driven at a higher frequency than a second region, an odd first scan clock is provided to a n+5-th scan stage at a begin of the second region, an even scan clock is provided to a n+4-th scan stage at an end of the first region, and an odd second scan clock is provided to a n+3-th scan stage of the first region, and in the multi-frequency mode, during a driving frame of refreshing the first region and refresh-skipping the second region, the odd first scan clock does not have an i+2-th clock pulse corresponding to a scan pulse of the n+4-th first scan line.