Display Substrate Scan Circuit Layout for Narrower AMOLED Bezels

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing AMOLED display panel designs face challenges in minimizing the bezel width due to the layout of shift register units in the scan driving circuit, which affects the overall thickness and efficiency of the display substrate.

Innovation Solution

The proposed display substrate incorporates a scan driving circuit with a specific arrangement of shift register units, voltage signal lines, and clock signal lines, where the output circuit includes an output transistor and an output reset transistor, and the signal output line is positioned between adjacent shift register units, optimizing the layout to reduce the transverse width and bezel size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the scan driving circuit is arranged in the edge area of the AMOLED display panel, then the circuit can be integrated, but the bezel width increases

Engineering Contradiction:
Improvecircuit integrationVSAvoidbezel width
Core Design Contradiction:
Device complexityVSLength of stationary object

Solution Approach 1:

The patent changes the traditional layout dimension by arranging signal lines and transistors in a staggered, multi-level configuration rather than linear progression. The odd-numbered and even-numbered shift register units are positioned at different vertical levels, allowing signal lines to extend horizontally while transistors are distributed vertically, effectively utilizing two-dimensional space to reduce the horizontal footprint of the scan driving circuit.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements nesting by placing the output circuit within the boundary of the shift register unit. Specifically, the output transistor is positioned between the first and second voltage signal lines, and the output reset transistor is positioned between the first voltage signal line and the signal output line, allowing these functional elements to be nested within the existing circuit structure rather than requiring separate dedicated spaces.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If the signal output line extends in the second direction intersecting the first direction, then the layout compactness improves, but the routing complexity increases

Engineering Contradiction:
Improvelayout compactnessVSAvoidrouting complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent segments the signal output line into multiple sections that are routed through different spatial zones. The signal output line extends in the second direction (intersecting the first direction) and is positioned between the output circuits of adjacent shift register units, creating a modular routing pattern that reduces overall routing complexity while maintaining compact layout.

Inventive Principle:
Principle #1Segmentation

3Length of stationary object

If the output circuit includes transistors between voltage signal lines, then the transverse width is reduced, but the manufacturing precision requirement increases

Engineering Contradiction:
Improvetransverse widthVSAvoidtransistor positioning precision
Core Design Contradiction:
Length of stationary objectVSManufacturing precision

Solution Approach 1:

The patent applies local quality by positioning specific transistors (output transistor and output reset transistor) in specific locations between voltage signal lines where space is most constrained. The output transistor is placed between the first and second voltage signal lines, while the output reset transistor is placed between the first voltage signal line and the signal output line, optimizing local space utilization without compromising overall manufacturability.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP4123904A1Display substrate and method for manufacturing same, and display apparatus
Publication Date: 2023.01.25 BOE TECHNOLOGY GROUP CO LTD
  • EP4123904A1 patent drawingFigure 1~2A
  • EP4123904A1 patent drawingFigure 2B~2C
  • EP4123904A1 patent drawingFigure 2D

AI summary

The present disclosure provides a display substrate, a manufacturing method and a display device. The display substrate comprises a scan driving circuit and a display area, wherein the scan driving circuit comprises a plurality of shift register units, a first voltage signal line, a second voltage signal line, a first clock signal line, and a second clock signal line, all of which extend in a first direction; and the display area comprises at least one driving transistor configured to drive a light-emitting element for display. At least one of the plurality of shift register units comprises an output circuit and a signal output line, wherein the output circuit is coupled to the first voltage signal line, the second voltage signal line, and the signal output line, and the signal output line extends in a second direction intersecting the first direction. The output circuit comprises a transistor that is provided between the first voltage signal line and the second voltage signal line.