Display Device Scanning Circuit Block Architecture for High Refresh Rates
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Solution Overview
Problem
Increased operating frequencies in display devices due to higher refresh rates lead to data supply issues, as the existing segmented drive circuits struggle to maintain data delivery across multiple blocks, resulting in potential errors and power consumption inefficiencies.
Innovation Solution
A display device architecture featuring a row selection circuit, signal supply circuit with N blocks, and a scanning circuit formed by connected shift registers, which sequentially selects and enables data holders to receive data, ensuring efficient data distribution and power management across columns, even at higher frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the operating frequency is increased to achieve higher refresh rates, then the display performance is improved, but the data supply capability of segmented drive circuits becomes insufficient
Solution Approach 1:
The patent applies preliminary action by enabling the (n+1)-th block in advance during the data write operation of the n-th block. This ensures that the next block is ready to receive data immediately when the current block finishes, eliminating idle time and maintaining continuous data flow at higher operating frequencies.
Solution Approach 2:
The patent implements continuity of useful action by overlapping the data write operation of the n-th block with the data reception preparation of the (n+1)-th block. This creates a continuous pipeline where data supply never stops, allowing the system to sustain higher operating frequencies without data supply bottlenecks.
2Use of energy by moving object
If blocks are switched between operating and non-operating states to save power, then power consumption is reduced, but data supply reliability deteriorates at high frequencies
Solution Approach 1:
The patent enables the (n+1)-th block preliminarily during the write operation of the n-th block, rather than waiting until the current block completes. This advance preparation ensures the next block is ready without extending the overall operation time, maintaining reliability while enabling power management for non-current blocks.
Solution Approach 2:
The patent implements periodic action by cycling blocks between active and inactive states in a structured sequence. While one block is actively writing data, the next block is prepared in advance, and previous blocks are deactivated to save power. This periodic activation pattern maintains data supply reliability while reducing overall power consumption.
3Use of energy by moving object
If blocks are deactivated after data writing to reduce power consumption, then energy efficiency is improved, but voltage fluctuations may occur
Solution Approach 1:
The (n-1)-th block is kept in the operation-enabled state preliminarily until the n-th block completes its data write operation. This ensures continuous power supply and stable voltage levels during the transition between blocks, preventing voltage fluctuations while still allowing earlier blocks to be deactivated for power savings.
Data Source
AI summary
A display device includes signal supply circuit having N blocks and data supply circuit for supplying data to the N blocks. Each block includes holding block having k data holders for supply signals to k columns, and scanning circuit block for sequentially selecting the k data holders to receive data from the data supply circuit. The scanning circuit block includes k-stage shift register formed from k registers. Scanning circuit is formed by N scanning circuit blocks each arranged in one of the N blocks, and sequentially selects the N holding blocks each arranged in one of the N blocks to sequentially select the k data holders of each selected holding block to receive data. In response to output from i-th register of n-th block, the data supply circuit sets (n+1)-th block in operation-enabled state.