Display Device Separate Reference Voltage Line Reduces Scan Time
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Solution Overview
Problem
Conventional display devices in VR or AR systems face nonuniform images due to insufficient settling time when shortening the periods for sampling reference and data voltages, leading to reduced frame rates.
Innovation Solution
A display device with a display driver circuit and panel that allows a first row of subpixels to sample reference and data voltages in sequential periods, while a second adjacent row samples the reference voltage during a period overlapping with the data sampling of the first row, enabling efficient overlap in voltage sampling without compromising image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the duration of periods for sampling reference voltages and data voltages is shortened to improve frame rate, then productivity is improved, but manufacturing precision deteriorates due to nonuniform images from insufficient settling time
Solution Approach 1:
The patent applies preliminary action by providing a reference voltage to each pixel before the data voltage during the settling period. This preliminary reference voltage is stored in the pixel's capacitor, ensuring that when the data voltage arrives, the pixel is already prepared and settled, eliminating settling errors even with shortened sampling periods. The reference voltage sampling occurs in advance for the next row while the current row is still displaying, preparing the system for the next frame cycle.
2Manufacturing precision
If sequential sampling of reference and data voltages is used for each row, then manufacturing precision is maintained, but loss of time increases due to non-overlapping sampling periods
Solution Approach 1:
The patent implements continuity of useful action by enabling overlapping sampling operations across different rows. While the first row is sampling data voltages during the second period, the second row simultaneously samples reference voltages during the third period. This continuous utilization of sampling circuits across multiple rows eliminates idle time and reduces overall scan time without compromising the settling time required for image uniformity.
Solution Approach 2:
The patent applies preliminary action by providing a reference voltage to each pixel before the data voltage during the settling period. This preliminary reference voltage is stored in the pixel's capacitor, ensuring that when the data voltage arrives, the pixel is already prepared and settled, eliminating settling errors even with shortened sampling periods. The reference voltage sampling occurs in advance for the next row while the current row is still displaying, preparing the system for the next frame cycle.
3Manufacturing precision
If separate reference voltage lines are provided for each pixel, then manufacturing precision is improved through better voltage control, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the reference voltage lines to serve multiple functions and multiple rows simultaneously. A single reference voltage line can provide reference voltages to multiple rows during different time periods, and the same sampling circuitry is reused across rows through time-multiplexed operation. This reduces the total number of dedicated reference voltage lines while maintaining precise voltage control for each pixel through the combination of separate timing control and shared physical infrastructure.
Data Source
AI summary
Embodiments relate to a display device with reduced scanning time by using a reference line separate from a data line to improve frame rate of the display device. A first pixel in a first row samples a reference voltage during a first period and samples a data voltage during a second period. A second pixel in a second row adjacent to the first row samples the reference voltage during a third period and samples the data voltage during a fourth period, where the third period overlaps with at least a portion of the second period. The reference voltage is provided by the reference line that is connected to a reference buffer, and the data voltage is provided by the data line connected to a source driver circuit.