Display Device Shared Contact Hole Reduces Peripheral Area
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Solution Overview
Problem
Flat panel display devices have a relatively large peripheral area due to the spacing of gate and source/drain electrode patterns, which increases the area required for connections and leads to higher contact resistance.
Innovation Solution
A display device design that includes a lower substrate with a light emitting structure, a lower wire, an upper wire, and an insulating layer with a connection pattern that electrically connects the wires through a shared contact hole, allowing partial overlap of the wires and reducing the width of the connection area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate electrode pattern and source/drain electrode pattern are spaced apart and connected through separate contact holes, then electrical connection is achieved, but the peripheral area increases and contact resistance increases
Solution Approach 1:
The patent merges two separate contact holes into a single shared contact hole that simultaneously connects both the gate electrode pattern and the source/drain electrode pattern to the wire. This consolidation reduces the total area occupied by contact structures in the peripheral region while maintaining reliable electrical connections to both electrode patterns.
2Reliability
If separate contact holes are used for gate and source/drain electrode patterns, then electrical connection is established, but contact resistance increases
Solution Approach 1:
By combining the connection functions into a single contact hole structure, the patent reduces the total contact resistance. The shared contact hole provides direct electrical pathways to both the gate electrode pattern and the source/drain electrode pattern, eliminating the need for multiple separate contact interfaces and thereby reducing cumulative contact resistance.
3Reliability
If gate and source/drain electrode patterns are spaced apart for connection, then electrical connection is possible, but the connection area width increases
Solution Approach 1:
The patent utilizes vertical layering and overlapping in the third dimension to enable the wire to partially overlap both the gate electrode pattern and the source/drain electrode pattern. This dimensional approach allows connections to be made through a narrower horizontal width by utilizing the vertical stacking and overlapping configuration, thereby reducing the connection area width while maintaining electrical connectivity.
Data Source
AI summary
A display device includes a lower substrate, a light emitting structure, a lower wire, an upper wire, an insulating layer, and a connection pattern. The light emitting structure is disposed in a display area on the lower substrate. The lower wire is disposed in a peripheral area on the lower substrate. The upper wire is disposed on the lower wire, and partially overlaps the lower wire. The insulating layer structure includes a first contact hole that exposes a first portion of the upper wire, which overlaps the lower wire, and a first portion of the lower wire, which is adjacent to a portion of the lower wire that overlaps the upper wire. The connection pattern is disposed on the insulating layer structure, the lower wire, and the upper wire, and electrically connects the upper wire to the lower wire through the first contact hole.