Display Device Shared Data Line IC Reduction
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Solution Overview
Problem
The high cost of manufacturing active matrix display devices is largely due to the number of expensive data driving IC chips required, which affects the cost-efficiency of the process.
Innovation Solution
The display device employs a configuration where pairs of first and second pixels share a single data line, with the second gate-on voltage applied earlier than the first, allowing for a reduced number of data lines and IC chips by overlapping gate-on voltage durations and using a signal controller to generate control signals for efficient data and gate driver operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If each pixel is connected to a separate data line with individual IC chips, then display performance is maintained, but manufacturing cost increases due to higher number of expensive data driving IC chips
Solution Approach 1:
The patent merges the function of multiple data lines into a single shared data line. Specifically, odd-numbered pixels and even-numbered pixels in adjacent rows share the same data line through alternating gate line activation. This consolidation reduces the total number of data lines and corresponding IC chips required, directly addressing the contradiction between manufacturing cost and device complexity.
Solution Approach 2:
The patent applies preliminary action by pre-charging pixel electrodes through alternating gate line activation before final image display. The first gate lines activate to charge pixels, then the second gate lines activate to charge adjacent pixels, ensuring all pixels are properly charged through sequential preparation phases. This allows the system to use fewer data lines while maintaining proper pixel charging functionality.
2Ease of manufacture
If the number of data driving IC chips is reduced, then manufacturing cost decreases, but data signal transmission capability must be maintained across all pixels
Solution Approach 1:
The patent implements periodic action through alternating activation of first and second gate lines in sequential phases. The gate drivers activate odd gate lines during one period, then even gate lines during the next period, creating a rhythmic scanning pattern. This periodic operation ensures that all pixels receive data signals reliably through time-division multiplexing, maintaining signal transmission reliability while using fewer physical data lines.
Solution Approach 2:
The patent applies dynamics by making the gate line activation pattern dynamic and time-varying. Instead of static simultaneous activation, the system dynamically switches between activating first gate lines and second gate lines in alternating sequences. This dynamic time-division approach allows a single data line to serve multiple pixels at different time intervals, maintaining reliable data transmission while reducing the number of required data lines and IC chips.
Data Source
AI summary
A display device that employs fewer IC chips and lends itself to cost-efficient manufacturing is presented. The device includes: a plurality of pixel rows including first and second pixels alternately arranged; a plurality of first and second gate lines disposed above and below the pixel rows and applying first and second gate-on voltages to the first and the second pixels, respectively; data lines intersecting the first and the second gate lines, each data line disposed between the first and the second pixels in a pair of first and second pixels and applying data voltages to the first and the second pixels; first and second gate drivers applying the first and the second gate-on voltages to the first and the second gate lines; and a data driver applying the data voltages to the data lines, wherein the second gate-on voltage is applied earlier than the first gate-on voltages by a predetermined time.