Active-Area Display Layout With Shielding Layer for Screen Spot Reduction
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Solution Overview
Problem
Display devices suffer from screen spots due to parasitic capacitance and require a bezel area to cover the printed circuit board, limiting the reduction of bezel size and affecting display quality.
Innovation Solution
The display device incorporates data link lines within the active area and includes a shielding layer over driving transistors to reduce parasitic capacitance and screen spots, while bending the substrate to minimize the bezel area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If link lines are disposed in the active area to reduce bezel area, then bezel area is reduced, but parasitic capacitance increases causing screen spots
Solution Approach 1:
A shielding layer is introduced as an intermediary element between the link line and the driving transistor. This shielding layer, connected to a fixed potential (ground or power supply), acts as a mediator that blocks the parasitic capacitance coupling between the link line and transistor, thereby eliminating screen spots while allowing the link line to remain in the active area
Solution Approach 2:
The shielding layer converts the harmful parasitic capacitance effect into a beneficial shielding effect. By placing a conductive layer at a fixed potential between the link line and transistor, the原本 harmful capacitive coupling is transformed into a controlled shielding arrangement that actually protects the transistor from voltage fluctuations
2Area of stationary object
If link lines are disposed in the active area to reduce bezel area, then bezel area is reduced, but display quality deteriorates due to screen spots
Solution Approach 1:
The shielding layer serves as a mediator that protects the display quality by blocking the harmful electromagnetic coupling between link lines and transistors, thereby preventing screen spots while maintaining the reduced bezel design
Solution Approach 2:
The shielding layer is placed in advance to prevent the formation of parasitic capacitance effects before they can cause screen spots. This preliminary protective measure ensures display quality is maintained throughout operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves display reliability by reducing luminance deviation and allows for a narrower bezel, enabling higher resolution displays.
Implementation Method 1
a parasitic capacitance generated between a link line and a driving transistor in an active area of the display device is reduced
Data Source
AI summary
A display device can include a substrate including an active area including a plurality of sub-pixels and a non-active area, a plurality of light-emitting elements disposed in the plurality of sub-pixels, a plurality of data lines disposed in the active area, a plurality of data link lines disposed in the active area and configured to transmit a data voltage to the plurality of data lines, driving transistors disposed in the plurality of sub-pixels, and a shielding layer disposed on the driving transistors to overlap a conductive layer connected to a source electrode of one of the driving transistors. A constant voltage can be applied to the shielding layer and thus, the occurrence of screen spots can be reduced in the display device.