Dynamic Reference Frequency Adjustment for Display Signal Processing
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Solution Overview
Problem
Existing image processing ICs are limited by their narrow allowable frequency range, making it difficult to process input signals with frequencies outside this range, and existing methods for handling frequency variations are inadequate for broader ranges.
Innovation Solution
A display device configuration that includes a first IC for processing input signals, a second IC for further processing, and a setting unit that measures the frequency of the input signal and sets a reference frequency to include the input signal within the first IC's receivable range, allowing the IC to process signals beyond its specified frequency range by adjusting the PLL circuit's lock range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the first IC uses a fixed reference frequency within a narrow allowable range, then the IC can maintain stable internal processing and synchronization, but the IC cannot process input signals with frequencies outside this range
Solution Approach 1:
The reference frequency is changed from a fixed value to a dynamically adjustable parameter. The setting unit measures the input signal frequency and adjusts the reference frequency accordingly, allowing the IC to adapt to different input frequencies while maintaining stable processing through the PLL circuit's frequency locking capability
Solution Approach 2:
The reference frequency parameter is modified based on the measured input signal frequency. By changing this key parameter, the IC's receivable frequency range is effectively expanded without altering the fundamental circuit architecture, thus maintaining reliability while improving adaptability
2Adaptability or versatility
If the IC processes signals with frequencies outside its specified range, then frequency adaptability improves, but the internal clock synchronization and processing stability deteriorate
Solution Approach 1:
The PLL circuit acts as an intermediary between the variable reference frequency and the internal processing circuits. It converts the adjusted reference frequency into a stable internal clock signal, isolating the internal processing from frequency variations and maintaining synchronization stability while accepting a broader input frequency range
Solution Approach 2:
The system implements a feedback mechanism where the output of the PLL circuit is monitored and used to maintain stable internal processing. The PLL continuously adjusts its output to match the phase and frequency requirements of the internal circuits, ensuring stable operation even when the reference frequency is adjusted for different input signals
3Measurement precision
If a frequency counter method is used to detect carrier frequency, then frequency measurement capability is improved, but the method is limited to narrow frequency variation ranges and increases device complexity
Solution Approach 1:
The setting unit utilizes the existing PLL circuit and its inherent frequency locking capability to perform frequency measurement, rather than introducing a separate frequency counter system. The PLL naturally locks to the input frequency, and this locked frequency is directly used as the reference frequency, eliminating the need for additional measurement hardware and reducing system complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the first IC to securely process input signals with frequencies outside its original range, reducing processing load and allowing for high-speed signal transmission and processing of signals over a broader frequency range, including resolution conversion, color correction, and image blending.
Implementation Method 1
an IC of this type synchronizes the clock frequency for internal processing with input data within a predetermined frequency range, for example, using a PLL (phase-locked loop)
Data Source
AI summary
A display device which displays an image based on an input image signal includes: a first IC which performs first processing on the input image signal; a second IC which performs second processing on the signal processed by the first IC; and a setting unit which measures a frequency of the input image signal and sets a reference frequency inputted to the first IC, based on the measured frequency. The first IC is configured to be able to receive the input image signal within a frequency range decided by the reference frequency. The setting unit sets the reference frequency such that the frequency range decided by the reference frequency includes the frequency of the input image signal, if the frequency of the input image signal is out of the frequency range decided by the reference frequency.