Display Device Signal Line Selection Circuit Reducing Drive IC Terminals
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Solution Overview
Problem
Conventional organic electroluminescence (EL) displays require a large number of output terminals in the drive IC, increasing manufacturing costs, due to the need for each terminal to be connected to multiple signal lines, which shortens the signal writing period and may not allow sufficient time for the gate voltage of the drive transistor to reach the required level for proper signal writing.
Innovation Solution
A driving method and display device that uses a signal line selection circuit to connect each output terminal of the drive IC to multiple signal lines in alternating half periods of a horizontal scan, allowing pixel signals to be stored and converged for a longer period, ensuring sufficient time for signal writing and reducing the number of output terminals needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If each output terminal of the drive IC is connected to multiple signal lines in alternating half periods, then the number of output terminals is reduced, but the signal writing period is shortened
Solution Approach 1:
The drive IC outputs pixel signal voltages to multiple signal lines in alternating half periods of a horizontal scan period. Each output terminal is connected to multiple signal lines sequentially, with the first output terminal connected to the first signal line in the first half period and to the second signal line in the second half period. This periodic switching enables reduction of output terminal count while maintaining signal writing functionality.
Solution Approach 2:
The connection between output terminals and signal lines is made dynamic through time-sequential switching. The signal line selection circuit changes connections based on the timing within the horizontal scan period, allowing a fixed number of output terminals to serve multiple signal lines dynamically throughout the scanning process.
2Ease of manufacture
If the signal writing period is shortened by reducing output terminals, then the manufacturing cost is reduced, but the gate voltage may not reach the required level for proper signal writing
Solution Approach 1:
The pixel signal voltage is output to the signal line in advance during the first half period before the actual pixel driving operation. This preliminary signal writing ensures that the gate voltage has sufficient time to reach the required level (Vsig−Vth) before the second half period begins, maintaining reliable signal writing despite the shortened overall period per signal line.
Solution Approach 2:
While one output terminal is writing signals to one signal line in the first half period, other output terminals simultaneously write signals to other signal lines. This continuous parallel operation ensures that all signal lines receive their pixel signal voltages within the same horizontal scan period, maintaining overall system reliability and continuity.
Data Source
AI summary
In the first signal writing period which is a portion of one horizontal scan period, a first pixel signal is input to the first signal line. The first pixel signal is input from the first signal line to a first pixel circuit throughout a first signal converging period which is longer than the first signal writing period. A second pixel signal is input to the second signal line in a second signal writing period which is another portion of the one horizontal scan period. The second pixel signal is input from the second signal line to a second pixel circuit throughout a second signal converging period which is longer than the second signal writing period. After the first signal converging period and the second signal converging period, electric currents are supplied to the light emitting elements of the first pixel circuit and of the second pixel circuit.