Display Signal Timing Adjustment for Accurate Clock-Data Sampling
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Solution Overview
Problem
In display systems, the timing relationship between the clock and data signals can change due to different delays in the signal transmission lines, leading to incorrect sampling and resulting in noise and display defects such as flashing or color deviation on the display panel.
Innovation Solution
A signal adjustment method that delays the clock and data signals by specific amounts to adjust the timing relationship, comparing the sampled data with reference data to determine if adjustments are needed, and modifying the sampled data to indicate errors, thereby ensuring correct sampling and reducing noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the clock and data signals are transmitted through different signal transmission lines, then the signals can be transmitted in parallel to improve processing speed, but the timing relationship between the clock and data signals may change due to different delays, leading to incorrect sampling
Solution Approach 1:
The patent applies preliminary action by measuring the timing relationship between clock and data signals before actual sampling operations. A measurement mode is implemented where the timing relationship is characterized in advance, and then compensation values are calculated and stored. During normal operation, these pre-calculated compensation values are applied to correct the timing relationship, ensuring accurate sampling without real-time measurement overhead.
Solution Approach 2:
The patent implements feedback by continuously monitoring the timing relationship between clock and data signals through measurement circuits. The measured timing differences are fed back to control circuits that adjust delay amounts or select appropriate compensation values, creating a closed-loop system that maintains accurate sampling despite variations in signal transmission delays.
2Reliability
If delay adjustment circuits are added to adjust the timing relationship between clock and data signals, then sampling accuracy can be improved, but the device complexity increases
Solution Approach 1:
The patent applies dynamics by implementing adjustable delay circuits that can dynamically modify the delay amount based on measured timing relationships. The delay adjustment is not fixed but can be changed according to different signal conditions, allowing the system to adapt to varying timing requirements while maintaining manageable complexity through controlled adjustability rather than multiple fixed circuits.
Solution Approach 2:
The patent changes parameters by adjusting delay amounts as a controllable variable parameter. Instead of adding complex circuitry, the solution modifies the delay parameter of existing signal paths. Multiple preset delay values are stored in lookup tables, and the appropriate parameter is selected based on measured timing conditions, achieving accurate sampling through parameter optimization rather than structural complexity.
3Reliability
If real-time measurement and adjustment of timing relationship is performed, then sampling accuracy is maintained, but the processing time and system complexity increase
Solution Approach 1:
The patent performs timing relationship measurements and compensation value calculations in advance during a measurement mode before normal sampling operations. The results are stored in memory for quick retrieval. During actual sampling, the system simply applies pre-calculated compensation values rather than performing real-time measurements, significantly reducing processing time while maintaining sampling accuracy.
Solution Approach 2:
The patent implements periodic measurement and adjustment cycles. The system alternates between measurement mode where timing relationships are characterized and normal mode where pre-measured compensation is applied. This periodic approach allows accurate timing characterization to be performed occasionally while maintaining high-speed sampling during normal operation, balancing accuracy requirements with processing time constraints.
Data Source
AI summary
A signal adjustment method, a signal adjustment circuit, an image processing circuit and a display device are disclosed. The signal adjustment method is used for adjusting a display signal including an original clock signal and an original data signal, and the method includes: delaying the original clock signal by a first delay amount to obtain a reference clock signal; delaying the original data signal by a second delay amount to obtain a reference data signal; sampling the reference data signal with the reference clock signal to obtain a sampled data; comparing the sampled data with a reference data to obtain a comparison result; and adjusting a reference timing relationship according to the comparison result, and the reference timing relationship is a timing relationship between the reference clock signal and the reference data signal.