Display Stage Node Control for Reset Voltage Stability
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Solution Overview
Problem
During a forcible reset, display devices experience a short-circuit between gate voltages, leading to abnormal light emission phenomena like screen flickering due to delayed application of gate-high voltage in lower stages of the light emission driver, causing a short-circuit between pixel power and data voltage.
Innovation Solution
A stage with a node control unit and an output unit that includes a short-circuit prevention transistor to ensure proper voltage control and prevent short-circuits by applying a first gate voltage to a low buffer gate, using a thirteenth transistor to quickly turn off the tenth transistor and maintain stable light emission control signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If power is turned on after a forcible reset, then the device can resume operation, but a short-circuit occurs between gate voltages due to delayed application of first gate voltage in lower stages
Solution Approach 1:
The patent applies preliminary action by pre-charging the first gate voltage to the low buffer gate of the output unit before the light emission control signal is output. This ensures that when power is restored after a forcible reset, the first gate voltage is already present and ready to prevent short-circuits, eliminating the delay that causes instability during operation resumption.
2Ease of operation
If a light emission control signal is output during normal operation, then pixels can emit light properly, but a short-circuit occurs between first gate voltage and second gate voltage in lower stages
Solution Approach 1:
The patent applies preliminary action by pre-charging the first gate voltage to the low buffer gate before the light emission control signal is output. This ensures that when the signal is output, the first gate voltage is already present and ready to prevent short-circuits, eliminating the delay that causes instability during operation resumption.
Solution Approach 2:
The patent uses the low buffer gate as an intermediary element between the first gate voltage source and the light emission control signal output. This intermediary component ensures proper voltage sequencing and prevents direct short-circuiting by mediating the voltage application timing.
3Loss of time
If power is turned on quickly after forcible reset, then device availability increases, but abnormal light emission phenomena occur due to voltage short-circuits
Solution Approach 1:
The patent applies preliminary action by pre-charging the first gate voltage to the low buffer gate before the light emission control signal is output. This ensures that when the signal is output, the first gate voltage is already present and ready to prevent short-circuits, eliminating the delay that causes instability during operation resumption.
Data Source
AI summary
A stage including a node control unit which controls a voltage of a first control node and a voltage of a second control node, in correspondence with a first input signal supplied to a first input terminal, a second input signal supplied to a second input terminal, and a third input signal supplied to a third input terminal, a node maintenance unit which maintains the voltage of the first control node to be constant in correspondence with the voltage of the second control node, and an output unit which supplies a first gate voltage supplied to a first power terminal or a second gate voltage supplied to a second power terminal to an output terminal in correspondence with the voltage of the first control node and the voltage of the second control node.