Flat Panel Display Storage Capacitor Segmentation
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Solution Overview
Problem
In flat panel display devices, the active layer used to form a thin film transistor often results in static electricity charges and low conductivity, leading to increased area requirements for the storage capacitor to achieve desired capacitance.
Innovation Solution
A flat panel display device design featuring a storage capacitor arranged in parallel with a first storage electrode at the same level as the gate electrode, a second storage electrode extending from the common voltage line, and a third storage electrode extending from the drain electrode, utilizing interlayer adjusting layers and materials with varying permittivity to enhance capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the active layer is extended to form a storage capacitor, then the capacitance is secured, but the area of the storage capacitor increases
Solution Approach 1:
The storage capacitor is divided into three separate electrodes (first storage electrode, second storage electrode, and third storage electrode) arranged in parallel. This segmentation allows the capacitor to achieve desired capacitance through parallel connection while reducing the area occupied by each individual electrode component.
Solution Approach 2:
The first storage electrode is positioned at the same level as the gate electrode, creating a three-dimensional electrode arrangement. This spatial reconfiguration in multiple dimensions enables parallel capacitor formation without proportionally increasing the planar area occupation.
2Reliability
If the area of the lower electrode is increased to secure desired capacitance, then the capacitance is improved, but the aperture ratio decreases
Solution Approach 1:
By segmenting the storage capacitor into three electrodes arranged in parallel, the total capacitance is achieved through the combination of smaller electrode areas rather than requiring one large electrode, thereby preserving more area for the aperture.
Solution Approach 2:
The patent changes the electrical configuration parameter by arranging capacitors in parallel rather than series, and positions electrodes at different levels (same level as gate electrode), which alters the capacitance accumulation method to be more area-efficient.
3Ease of manufacture
If polysilicon is used to form the active layer, then the device can be manufactured, but static electricity charges accumulate
Solution Approach 1:
Interlayer adjusting layers are introduced as intermediary elements between the active layer and other structures. These adjusting layers serve as mediators that can manage static electricity accumulation while maintaining the manufacturability of using polysilicon for the active layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases capacitance while reducing the area occupied by the storage capacitor, thereby improving the aperture ratio of the pixel and reducing the overall size of the display device.
Implementation Method 1
utilizing interlayer adjusting layers and materials with varying permittivity to enhance capacitance
Data Source
AI summary
A flat panel display device having increased capacitance and a method of manufacturing the flat panel display device are provided. A flat panel display device includes: a plurality of pixel areas, each located at a crossing region of a gate line, a data line, and a common voltage line; a thin film transistor (TFT) located at a region where the gate line and the data line cross each other, the TFT including a gate electrode, a source electrode, and a drain electrode; and a storage capacitor located at a region where the common voltage line and the drain electrode cross each other, the storage capacitor including first, second, and a third storage electrodes.