Display Substrate Layout for High-PPI Aperture Ratio

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Solution Overview

Problem

The challenge in VR display technology is to maintain a high aperture ratio in liquid crystal displays with high pixel density, which affects power consumption and display efficiency due to reduced transmittance and increased power consumption.

Innovation Solution

A display substrate design with intersecting gate and data lines, including a channel portion in the active layer that overlaps with data lines, and transparent electrode strips to enhance aperture ratio and reduce power consumption, while ensuring thin film transistor characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If pixel density is increased to achieve high resolution in VR displays, then resolution is improved, but aperture ratio is reduced

Engineering Contradiction:
ImproveresolutionVSAvoidaperture ratio
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent applies dimensionality change by moving the channel portion from a planar arrangement to a three-dimensional overlapping configuration where the channel portion extends vertically over the data line. This allows the channel to occupy space in the Z-dimension rather than only the XY-plane, effectively increasing the aperture ratio while maintaining the required pixel density for high resolution displays.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If pixel size is reduced to increase pixels per inch, then pixels per inch is improved, but transmittance is reduced

Engineering Contradiction:
Improvepixels per inchVSAvoidtransmittance
Core Design Contradiction:
Measurement precisionVSIllumination intensity

Solution Approach 1:

By positioning the channel portion in a different layer that overlaps with the data line, the patent utilizes the vertical dimension to accommodate the channel structure. This reduces the horizontal space required for the channel, allowing smaller pixel sizes while maintaining adequate transmittance area in the liquid crystal layer, thereby achieving higher PPI without proportionally reducing transmittance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Illumination intensity

If aperture ratio is increased to improve transmittance, then transmittance is improved, but display screen size is reduced

Engineering Contradiction:
ImprovetransmittanceVSAvoiddisplay screen size
Core Design Contradiction:
Illumination intensityVSArea of stationary object

Solution Approach 1:

The overlapping configuration of the channel portion over the data line in the vertical dimension allows for increased aperture ratio without expanding the horizontal pixel pitch. This enables larger effective display area within the same physical screen dimensions, improving transmittance while maintaining or increasing the display screen size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20260016725A1Display substrate and display panel
Publication Date: 2026.01.15 BEIJING BOE TECH DEV CO LTD
  • US20260016725A1 patent drawing
  • US20260016725A1 patent drawing
  • US20260016725A1 patent drawing

AI summary

A display substrate includes a substrate, a plurality of gate lines extending along a first direction and a plurality of data lines extending along a second direction, each of which is arranged on a side of the substrate. The plurality of gate lines are arranged in a layer different from a layer where the plurality of data lines are arranged. Orthogonal projections of the plurality of gate lines on the substrate intersect orthogonal projections of the plurality of data lines on the substrate to define a plurality of pixel units. Each pixel unit includes at least one transistor including an active layer. The active layer includes a channel portion and a pair of electrical connection portions connected to both sides of the channel portion. An orthogonal projection of the channel portion on the substrate overlaps with an orthogonal projection of a corresponding data line on the substrate.