Display Substrate Aperture Ratio Optimization via Storage Capacitor Placement
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Solution Overview
Problem
Existing display substrates face challenges in achieving high aperture ratios due to limited layout space, which affects the performance and service life of active-matrix organic light-emitting diode (AMOLED) display devices, particularly in bottom emission structures where the storage capacitor's placement can lead to crosstalk and reduced capacitance.
Innovation Solution
The display substrate design includes a storage capacitor positioned in the aperture area of each sub-pixel, allowing for a larger layout space and shared gate lines among sub-pixels, reducing the number of signal lines and increasing the aperture ratio by reusing gate lines for data writing and sensing transistors, and optimizing the placement of transparent electrode plates to enhance capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the storage capacitor is placed in the non-aperture area of sub-pixels, then the layout space is limited, but the aperture ratio is reduced and crosstalk occurs
Solution Approach 1:
The storage capacitor is moved from the non-aperture area (2D plane constraint) into the aperture area by utilizing the vertical dimension and transparent electrode plates, allowing the capacitor to occupy space that does not block light emission while significantly increasing the non-aperture area available for other components
Solution Approach 2:
The patent uses transparent electrode plates for the storage capacitor in the aperture area, making the capacitor electrically functional while optically invisible. This local quality change (transparency) allows the capacitor to be placed in the aperture area without reducing the effective aperture ratio
2Reliability
If more signal lines are added for data writing and sensing transistors, then the transistor control is improved, but the number of signal lines increases and aperture ratio decreases
Solution Approach 1:
Gate lines are designed to serve multiple functions: they control data writing transistors in one row while simultaneously controlling sensing transistors in the previous row. This multi-functionality reduces the total number of gate lines needed, increasing the aperture ratio while maintaining reliable transistor control
Solution Approach 2:
The patent merges the control functions of data writing and sensing transistors into shared gate lines. By combining these control functions, the number of separate signal lines is reduced, freeing up aperture area while ensuring both transistor types receive proper control signals
Data Source
AI summary
The present disclosure provides a display substrate, a method for manufacturing the same, a driving method and a display device. The display substrate includes a base substrate, gate lines, data lines and sub-pixels. The sub-pixels include sub-pixel columns corresponding to the data lines in a one-to-one manner. In a sub-pixel driving circuit of the sub-pixel, a driving transistor and a data writing transistor are located at a first side of an aperture area of the sub-pixel; a sensing transistor is located at a second side of the aperture area of the sub-pixel. The first side and the second side are opposite sides of the aperture area along the extension direction of the data lines. Gate electrodes of sensing transistors in a same sub-pixel row, and gate electrodes of data writing transistors in an adjacent next sub-pixel row, are all coupled to a gate line corresponding to the adjacent next sub-pixel row. There is a first overlapping area between an orthographic projection of a first electrode plate of the storage capacitor to the base substrate and an orthographic projection of a second electrode plate of the storage capacitor to the base substrate; an orthographic projection of the first overlapping area to the base substrate at least partially overlaps an orthographic projection of the corresponding aperture area of the sub-pixel.