Display Substrate Layout with Auxiliary Electrode Lines for Signal Stability
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Solution Overview
Problem
In high-resolution OLED displays, issues such as increased pixel density, signal line resistance-capacitance load, and parasitic resistance and capacitance lead to signal delay, voltage drop, and non-uniform display, particularly in large 8K resolution devices.
Innovation Solution
The display substrate design includes auxiliary electrode lines connected in parallel with power lines to reduce resistance, and the arrangement of signal lines minimizes direct adjacency to data lines, using transistors and capacitors to manage voltage and detect electrical characteristics for compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If pixel density is increased to achieve high-resolution display, then display resolution is improved, but signal line resistance-capacitance load increases causing signal delay and voltage drop
Solution Approach 1:
The patent segments the power supply function by introducing auxiliary power lines separate from data lines. Each sub-pixel group receives power through dedicated auxiliary lines, reducing the capacitive load on data lines and minimizing signal delay while maintaining high resolution display capabilities
Solution Approach 2:
The patent introduces auxiliary power lines as intermediary elements between the power source and sub-pixels. These auxiliary lines act as mediators that carry power signals independently, reducing the interaction between data signals and power delivery, thereby minimizing voltage drop and signal delay in high-resolution displays
2Reliability
If data lines are arranged to minimize adjacency, then signal interference is reduced, but layout complexity increases
Solution Approach 1:
The patent segments the display into sub-pixel groups with systematic line arrangements. Data lines and auxiliary power lines are organized in alternating patterns, creating regular spacing that reduces signal interference while maintaining manageable layout complexity through predictable geometric progression
Solution Approach 2:
The patent applies different arrangement strategies to different regions: data lines are spaced to minimize capacitive coupling in critical signal transmission zones, while auxiliary power lines are positioned to optimize power delivery. This localized optimization reduces overall interference without requiring complete redesign of the entire line architecture
3Reliability
If auxiliary power lines are added to reduce voltage drop, then power delivery is improved, but device complexity increases
Solution Approach 1:
The patent merges the power delivery function into the existing display line architecture by introducing auxiliary power lines that share the same physical layer structure as data lines. This integration approach improves voltage stability without requiring separate power delivery infrastructure, thereby limiting the increase in overall device complexity
Solution Approach 2:
The auxiliary power lines serve multiple functions: they provide power delivery, act as reference planes for signal integrity, and enable voltage compensation. This multi-functionality reduces the need for additional dedicated structures, improving voltage stability while minimizing the net increase in device complexity
Data Source
AI summary
A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. The sub-pixels are arranged in a sub-pixel array in a first direction and a second direction, the first direction intersecting with the second direction. The display substrate further includes data lines and an auxiliary electrode line extended in the first direction, the auxiliary electrode line is configured to be electrically connected with a first electrode of the light emitting element to provide a power voltage; the auxiliary electrode line is in a same layer as and insulated from any one data line.