Display Substrate Bridge Line Shielding Parasitic Capacitance
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Solution Overview
Problem
In liquid crystal display (LCD) apparatuses, parasitic capacitance between the pixel electrode and the gate or data lines can degrade display quality, while spacing the pixel electrode further from these lines to reduce capacitance decreases the aperture ratio.
Innovation Solution
A display substrate design featuring a base substrate with a first and second line, a bridge line, a thin-film transistor (TFT), and a storage line, where the TFT includes a source electrode connected to one of the lines, and the pixel electrode is formed on the storage line to overlap with it, reducing parasitic capacitance and increasing the aperture ratio by positioning the data line under a vertical storage part.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the pixel electrode is positioned close to the gate line or data line, then the aperture ratio is increased, but parasitic capacitance increases degrading display quality
Solution Approach 1:
A bridge line is introduced as an intermediary conductive structure that electrically connects the gate line to the data line. This bridge line is positioned between the pixel electrode and the signal lines (gate line/data line), serving as a shield that reduces parasitic capacitance coupling between the pixel electrode and the signal lines while allowing the pixel electrode to maintain close proximity for high aperture ratio.
Solution Approach 2:
The bridge line extends in a direction different from both the gate line (first direction) and data line (second direction), creating a three-dimensional routing solution. This dimensional change allows the bridge line to physically intervene between the pixel electrode and signal lines without increasing planar spacing, thus reducing parasitic capacitance while maintaining compact layout for high aperture ratio.
2Object-affected harmful factors
If the pixel electrode is spaced apart from the gate line or data line to reduce parasitic capacitance, then display quality is improved, but the aperture ratio is decreased
Solution Approach 1:
The bridge line acts as a shield positioned between the pixel electrode and signal lines, reducing parasitic capacitance without requiring increased spacing. This intermediary structure allows the pixel electrode to remain close to signal lines for high aperture ratio while the bridge line mitigates capacitive coupling effects.
Solution Approach 2:
The bridge line is strategically positioned only in specific regions where parasitic capacitance coupling occurs between the pixel electrode and signal lines. This localized shielding approach reduces parasitic capacitance precisely where needed without affecting other areas, maintaining high aperture ratio in the overall pixel structure.
Data Source
AI summary
A display substrate includes a base substrate, a first line, a second line, a bridge line, a thin-film transistor (TFT), a storage line, and a pixel electrode. The first line extends in a first direction on the base substrate. The second line extends in a second direction on the base substrate and is divided into two portions with respect to the first line. The bridge line makes contact with the two portions of the second line in first and second bridge contact regions. The TFT includes a source electrode making contact with one of the first and second lines in a data contact region. The storage line is formed on the one of the first and second lines. The pixel electrode is formed on the storage line and is electrically connected to the TFT. The display substrate reduces formation of parasitic capacitance between pixel electrode and data line.