Display Substrate Capacitor Layout for High-Density Signal Stability

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Solution Overview

Problem

In OLED display technology, the increased pixel density of high-resolution displays leads to higher resistance and parasitic capacitance in signal lines, causing signal delay and voltage drop, which affects display quality.

Innovation Solution

The display substrate design includes a pixel circuit with a drive sub-circuit, data write sub-circuit, compensation sub-circuit, and storage sub-circuit, with specific terminal configurations and capacitor arrangements to manage signal lines and reduce parasitic capacitance, and the use of overlapping signal lines to form capacitors that stabilize the storage capacitor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If pixel density is increased to achieve high-resolution display, then display quality is improved, but signal line resistance and parasitic capacitance increase causing signal delay and voltage drop

Engineering Contradiction:
Improvedisplay qualityVSAvoidsignal stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent utilizes the third dimension (vertical stacking) by forming capacitors through overlapping of conductive layers in the vertical direction. This allows capacitance to be generated without increasing the planar area, effectively addressing the signal stability issue while maintaining high pixel density for high-resolution display.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent merges multiple functions into the overlapping conductive structures. The same overlapping regions serve both as signal transmission paths and as capacitor formation areas, reducing the need for separate capacitor structures and minimizing additional parasitic elements that would worsen signal stability.

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If pixel density is increased to achieve high-resolution display, then display quality is improved, but signal delay and voltage drop increase

Engineering Contradiction:
Improvedisplay qualityVSAvoidsignal delay
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

By forming capacitors in the vertical dimension through overlapping layers, the patent reduces the RC time constant without increasing horizontal signal path length. This maintains signal transmission speed while enabling high pixel density for improved display quality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If capacitor electrodes are arranged in overlapping layers to form capacitors, then storage capacitor stability is improved, but device complexity increases

Engineering Contradiction:
Improvestorage capacitor stabilityVSAvoidcapacitor arrangement complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The overlapping conductive layers serve multiple purposes: they function as signal transmission lines and simultaneously form capacitor electrodes. This multi-functionality reduces the need for dedicated capacitor structures, simplifying the overall device architecture while maintaining storage capacitor stability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the signal line function and capacitor electrode function into a single structural element (the overlapping conductive layers). This merging reduces the total number of components and simplifies the device structure while achieving the desired capacitor stability.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves the stability of the storage capacitor and reduces signal delay and voltage drop, enhancing the display quality by optimizing the arrangement of sub-pixels and signal lines on the substrate.

Implementation Method 1

the first capacitor electrode in the first sub-pixel is overlapped with the first data line in a direction perpendicular to the base substrate to provide a first capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11903256B2Display substrate and display device
Publication Date: 2024.02.13 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US11903256B2 patent drawing
  • US11903256B2 patent drawing
  • US11903256B2 patent drawing

AI summary

A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of sub-pixels on the base substrate. Each sub-pixel includes a pixel circuit; pixel circuits are in columns in a first direction and rows in a second direction. The sub-pixels includes a first sub-pixel, and the display substrate further includes a first data line extended in the first direction and connected with the first sub-pixel. The sub-pixels further includes a second sub-pixel directly adjacent to the first sub-pixel in the second direction. A first capacitor electrode in the first sub-pixel and a first capacitor electrode in the second sub-pixel are in a same layer and are spaced apart from each other; and the first capacitor electrode in the first sub-pixel is overlapped with the first data line in a direction perpendicular to the base substrate to provide a first capacitor.