Display Substrate Capacitor Protrusions for High-Resolution Pixel Circuits
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Solution Overview
Problem
Micro OLED displays face challenges with increased signal line resistance and parasitic capacitance due to higher resolutions, leading to signal delay, voltage drop, and display defects such as dark lines, particularly in high-resolution applications like AR and VR.
Innovation Solution
A display substrate design with optimized pixel circuit layout and wiring, incorporating a resistance device and specific transistor configurations to manage signal line resistance and capacitance, including a resistance device connected between the driving sub-circuit and the light-emitting element, and using complementary transistors for data writing to ensure signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If resolution is increased to achieve high-quality display, then display quality is improved, but signal line resistance and parasitic capacitance increase causing signal delay and voltage drop
Solution Approach 1:
The pixel circuit is divided into multiple functional sub-circuits (data writing sub-circuit, storage sub-circuit, driving sub-circuit) with dedicated transistors and capacitors. This segmentation allows optimization of each sub-circuit's function, reducing overall circuit complexity and parasitic effects while maintaining high resolution display quality.
Solution Approach 2:
Different regions of the display substrate employ different circuit configurations and material compositions. The resistance device uses high-resistivity material in specific regions to control current flow, while other regions use low-resistivity materials for signal transmission. This local optimization balances signal integrity with display quality across different areas.
2Reliability
If signal line resistance is reduced to prevent voltage drop, then signal integrity is improved, but device complexity increases due to additional resistance devices and circuit modifications
Solution Approach 1:
A resistance device is introduced as an intermediary component between the driving sub-circuit and the light-emitting element. This resistance device acts as a mediator to control current flow and reduce voltage drop across the signal line, improving signal integrity while maintaining a relatively simple circuit structure through its strategic placement.
Solution Approach 2:
The resistance device utilizes material with specifically controlled resistivity parameters to optimize current flow characteristics. By changing the electrical parameters of this intermediate component, the circuit achieves better signal integrity without requiring complete redesign of the entire pixel circuit structure.
3Speed
If parasitic capacitance is reduced to prevent signal delay, then response speed is improved, but manufacturing precision requirements increase due to optimized capacitor electrode design
Solution Approach 1:
The capacitor electrode design extends in the vertical direction with protrusion portions that overlap with electrodes from adjacent sub-pixels. This three-dimensional electrode configuration increases the effective capacitance area without proportionally increasing the horizontal footprint, thereby reducing parasitic capacitance while maintaining adequate storage capacity.
Solution Approach 2:
The capacitor electrodes of adjacent sub-pixels are designed to overlap and interleave with each other in a nested configuration. The protrusion portions of capacitor electrodes from one sub-pixel nest between the electrodes of neighboring sub-pixels, optimizing space utilization and reducing overall parasitic capacitance while maintaining manufacturing feasibility.
Data Source
AI summary
A display substrate and a display device are provided. The display substrate includes a sub-pixel and the sub-pixel includes a pixel circuit including a data writing sub-circuit, a storage sub-circuit and a driving sub-circuit. The second capacitor electrode of the storage sub-circuit includes a first protrusion portion and a second protrusion portion which are both protruded along a first direction.