Display Substrate Shift Register Topology for Narrow Frame Integration
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Solution Overview
Problem
The existing display technologies face challenges in efficiently integrating gate driving circuits on thin film transistor array substrates due to space congestion and signal interference, which affect the narrow frame design and display quality of display panels.
Innovation Solution
A display substrate design with a shift register unit that includes specific transistor configurations and connections, such as continuous control semiconductor layers and voltage stabilization circuits, to optimize the layout and reduce parasitic capacitance, thereby improving the narrow frame design and display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If gate driving circuits are directly integrated on thin film transistor array substrate, then productivity and integration are improved, but space congestion and signal interference worsen
Solution Approach 1:
The gate driving circuit is divided into multiple shift register units, each handling a portion of the gate lines. This segmentation reduces the complexity and space requirements of the integrated circuit while maintaining the driving capability, thereby reducing signal interference through distributed architecture
Solution Approach 2:
Clock signal lines are introduced as intermediary elements to coordinate the operation of the shift register units. These dedicated clock signal pathways provide synchronized control signals to various circuit components, reducing unwanted signal interference and improving the reliability of the integrated gate driving circuit
2Productivity
If gate driving circuits are directly integrated on thin film transistor array substrate, then productivity and integration are improved, but narrow frame design is compromised
Solution Approach 1:
The circuit layout transitions from traditional planar arrangements to multi-dimensional configurations, utilizing vertical stacking and three-dimensional space utilization. This allows the gate driving circuit to be integrated without proportionally increasing the horizontal frame width, enabling narrower display panels while maintaining integration functionality
3Ease of manufacture
If conventional transistor layout is used, then manufacturing is simpler, but space congestion increases
Solution Approach 1:
Multiple circuit functions are merged into shared components and pathways. For example, clock signal lines serve multiple shift register units simultaneously, and transistor arrangements are optimized to share common regions, reducing the overall circuit area while maintaining manufacturability through standardized fabrication processes
Data Source
AI summary
A display substrate and manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, and a shift register unit and a first clock signal line that are on the base substrate, the first clock signal line extends along a first direction on the base substrate and is configured to provide a first clock signal to the shift register unit, the shift register unit includes an input circuit, an output circuit, a first control circuit and an output control circuit, and the first control circuit includes a first control switch and a second control switch, an active layer of the first control switch and an active layer of the second control switch are a continuous control semiconductor layer, the control semiconductor layer extends along the first direction.