Display Substrate Data Metal Thickness for Low Resistance
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Solution Overview
Problem
High resistance in data lines of display apparatuses leads to unsatisfactory image display quality due to low charge rates of data signals to pixel electrodes.
Innovation Solution
A display substrate structure with a data metal pattern having a greater thickness than the semiconductor layer, ensuring low resistance and high charge rates, is implemented, along with a connection electrode to electrically connect the gate and data metal patterns through contact holes in insulating layers, and a static electricity prevention circuit in the peripheral area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional data line structure with standard thickness is used, then the device complexity is low and manufacturing is easy, but the resistance of the data line becomes high and the charge rate to the pixel electrode becomes low
Solution Approach 1:
The patent changes the thickness parameter of the data metal pattern from conventional standard thickness to greater than the semiconductor layer thickness. This parameter change directly reduces the resistance of the data line, thereby improving the charge rate to the pixel electrode without requiring fundamental structural changes.
Solution Approach 2:
The patent extends the data metal pattern into the vertical dimension by increasing its thickness beyond the semiconductor layer. This dimensional change allows the data line to provide both electrical connection function and low-resistance transmission function simultaneously, resolving the contradiction between simple structure and high performance.
2Reliability
If the data metal pattern thickness is increased to reduce resistance, then the charge rate improves, but the manufacturing precision requirements increase
Solution Approach 1:
The patent establishes a specific parameter range for the data metal pattern thickness (greater than the semiconductor layer thickness) that balances resistance reduction with manufacturability. This parameter optimization ensures sufficient charge rate improvement while maintaining reasonable manufacturing precision requirements.
Data Source
AI summary
A display substrate includes a base substrate, a gate metal pattern, a semiconductor layer, and a data metal pattern. The base substrate includes a display area and a peripheral area. The gate metal pattern includes a gate electrode of a transistor and includes a gate metal member disposed on the peripheral area. The transistor is disposed on the display area. The semiconductor layer includes a channel portion of the transistor and includes a semiconductor member disposed on the peripheral area. The data metal pattern includes a source electrode of the transistor and includes a data metal member disposed on the peripheral area, electrically connected to the gate metal member, and directly contacting the semiconductor member. A maximum thickness of the data metal member in a direction perpendicular to the base substrate is greater than a maximum thickness of the semiconductor member in the direction.