Display Substrate Dislocation Routing for Uniform Full-Screen Visuals
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing display technologies face challenges in achieving uniform full-screen visual display due to large length differences in conductive lines, leading to poor picture uniformity, especially in under-screen display regions.
Innovation Solution
A display substrate with a base substrate, multiple pixel circuits, and light emitting elements is designed, where the pixel circuits and light emitting elements are partitioned into different regions with dislocation connections, reducing conductive line length differences and improving uniformity by using transparent conductive lines in different layers to minimize mutual interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional display layout is used, then device complexity is reduced, but picture uniformity deteriorates due to large conductive line length differences
Solution Approach 1:
The display region is divided into first display region and second display region, with pixel circuits and light emitting elements arranged in different sub-regions. This segmentation allows independent optimization of conductive line lengths in each region, reducing overall length differences and improving picture uniformity.
Solution Approach 2:
The patent introduces a spatial reconfiguration by arranging first display region and second display region in specific geometric relationships. The conductive lines are routed through multiple paths and layers, transforming a one-dimensional length problem into a multi-dimensional routing problem, thereby reducing effective conductive line length differences.
2Manufacturing precision
If conductive line length differences are reduced, then picture uniformity is improved, but device complexity increases due to dislocation connections
Solution Approach 1:
The display substrate is segmented into multiple display regions with distinct connection topologies. First display region uses one type of pixel circuit arrangement while second display region uses another, allowing optimized local connections that reduce overall conductive line length differences.
Solution Approach 2:
The patent introduces intermediate connection structures that bridge different display regions. These intermediaries facilitate dislocation connections between pixel circuits and light emitting elements across region boundaries, enabling flexible routing that minimizes conductive line lengths while maintaining functional integrity.
3Object-generated harmful factors
If transparent conductive lines in different layers are used, then mutual interference is minimized, but manufacturing complexity increases
Solution Approach 1:
The patent transitions from planar two-dimensional conductive line arrangement to three-dimensional multi-layer stacking. By distributing transparent conductive lines across different layers, mutual interference is significantly reduced while maintaining electrical connectivity. This dimensional transition allows independent optimization of each layer's conductive paths.
Solution Approach 2:
Multiple transparent conductive lines are nested within a multi-layer structure, where each layer contains specific conductive paths. This nesting arrangement allows conductive lines to be spatially separated while maintaining functional integration, reducing mutual interference without requiring complete redesign of the conductive network.
Data Source
AI summary
Disclosed is a display substrate including a base substrate, a plurality of first light emitting elements, a plurality of first pixel circuits, and a plurality of second pixel circuits located in a first display region, and a plurality of second light emitting elements located in a second display region. The first display region includes a first first sub-display region to an N-th first sub-display region arranged sequentially along a side away from the second display region in a first direction, wherein N is an integer greater than 1. The second display region includes at least one second sub-display region. A second light emitting element of the second sub-display region is electrically connected with a second pixel circuit of an n-th first sub-display region, and a first light emitting element of the n-th first sub-display region is electrically connected with a first pixel circuit of an (n+i)-th first sub-display region.